Verilog jobs - Minneapolis, MN

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Jul 30 Senior Circuit Design Engineer Broadcom Edina, MN

lls; experience with Unix shell languages; understanding of issues and modeling of variation in deep sub-micron technologies; knowledge of verilog modeling; familiarity with... more

Jul 29 Engineer, Sr Staff Design Broadcom Edina, MN

d circuit simulation; experience with layout parasitic extraction and simulation tools; experience with Unix shell languages; knowledge of verilog modeling; familiarity with... more

Jul 29 Sr Staff Memory Design Engineer Broadcom Edina, MN

d circuit simulation; experience with layout parasitic extraction and simulation tools; experience with Unix shell languages; knowledge of verilog modeling; familiarity with... more

Jul 26 Senior Memory Design Engineer Broadcom Edina, MN

deep sub-micron technologies; knowledge of verilog modeling; familiarity with layout verification tools, design rules, and rule decks. Country United States State/Province... more

Jul 25 Digital, ASIC Design Engineer Chip Source Minneapolis, MN

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Jul 25 Senior Memory Design Engineer Broadcom Edina, MN

deep sub-micron technologies; knowledge of verilog modeling; familiarity with layout verification tools, design rules, and rule decks." Country United States State/Province... more

Jul 24 Senior Memory Design Engineer Broadcom Edina, MN

lls; experience with Unix shell languages; understanding of issues and modeling of variation in deep sub-micron technologies; knowledge of verilog modeling; familiarity with... more

Jul 23 Senior Memory Design Engineer Broadcom Edina, MN

deep sub-micron technologies; knowledge of verilog modeling; familiarity with layout verification tools, design rules, and rule decks." Country United States State/Province... more

Jul 21 Sr. DSP ASIC Design Engineer Baytech Solutions Minneapolis, MN

This position requires: Minimum of 8 years of experience in DSP algorithm Verilog/VHDL ... implementation tradeoff analysis, Verilog/VHDL design, behavioral modeling and... more

Jul 14 Senior Electrical Engineer Stewart, Cooper and Coon White Bear Lake, MN

hardware and software developmentVHDL or Verilog, schematic capture- Proven experience in developing mathematical algorithms and models of motion control systems- Motion control... more

Jul 09 Senior ASIC Engineer - DSP - ASIC design - VLSI - Verilog - RTL - 802.11 - VHDL - wireless - Cybercoders Bloomington, MN

ASIC Engineer - DSP - ASIC design - VLSI - Verilog - RTL - 802.11 - VHDL - wireless - ... 802.11 - VHDL - wireless - Required Skills Verilog, RTL, 802.11, DSP, ASIC, Design... more

Jul 09 Senior DSP Engineer - DSP - MSEE - ASIC design - VLSI - Verilog - RTL - 802.11 - VHDL - wireless Cybercoders Bloomington, MN

- DSP - MSEE - ASIC design - VLSI - Verilog - RTL - 802.11 - VHDL - wireless ... - 802.11 - VHDL - wireless Required Skills Verilog, RTL, 802.1, DSP, ASIC, Design... more

Jul 05 Senior Electrical Engineer Lasx Industries St Paul, MN

hardware and software development -VHDL or Verilog, schematic capture * Proven experience in developing mathematical algorithms and models of motion control systems * Motion... more

Jun 26 Junior Verilog Design Engineer with RTL design experience Minneapolis, MN

contributor designing and verifying complex Verilog Applications and perform block design, RTL implementation and verification as well as system functional and performance... more

Jun 26 Engineer, Sr Staff Design Broadcom Edina, MN

with Unix shell languages; knowledge of verilog modeling; familiarity with layout verification tools, design rules, and rule decks. Country United States State/Province Minnesota... more

Jun 23 Senior Design Engineer-Verilog with Xilinx experience Minneapolis, MN

contributor designing and verifying complex Verilog Applications and perform block design, RTL implementation and verification as well as system functional and performance... more

Jun 22 Senior Electrical Engineer Stephens International Recruiting White Bear Lake, MN

hardware and software development VHDL or Verilog, schematic capture - Proven experience in developing mathematical algorithms and models of motion control systems - Motion... more

Jun 22 Senior DSP Engineer - DSP - MSEE - ASIC design - VLSI - Verilog - RTL - 802.11 - VHDL - wireless Cybercoders Bloomington, MN

- DSP - MSEE - ASIC design - VLSI - Verilog - RTL - 802.11 - VHDL - wireless ... - 802.11 - VHDL - wireless Required Skills Verilog, RTL, 802.1, DSP, ASIC, Design... more

Jun 22 Senior Electrical Engineer Cameron Craig Group St Paul, MN

hardware and software development VHDL or Verilog, schematic capture - Proven experience in developing mathematical algorithms and models of motion control systems - Motion... more

Jun 17 ASIC Verification Engineer Seagate Technology Shakopee, MN

Desired skills include knowledge of System Verilog, Vera, VMM, Linux, object-oriented code, and/or tools used for ASIC development and verification. Additional skills that are a... more

Jun 15 Processor Physical Design Engineer LSI LOGIC Mendota Heights, MN

is strongly favored. . Working knowledge of Verilog, and have programming skills in Perl and TCL scripting languages. . Demonstrate the ability to work through technology... more

Jun 08 Principal Hardware Engineer Nationwide Executive Search St Paul, MN

FPGA designs, simulation, synthesis using Verilog/VHDL, and place and route tools. ... DSPs, 10/100BaseT Ethernet networks, PCI, Verilog/VHDL, and test bench development. more

Jun 06 Digital ASIC Verification Senior Engineer Seagate Technology Shakopee, MN

Knowledge of the Verilog HDL is preferred ... Knowledge of System Verilog is a plus.QualificationsBSEE/BSCS or Master degree preferred... more

Jun 05 ASIC Verification Engineer Seagate Technology Shakopee, MN

Science preferred. Knowledge of System Verilog is a plus. Overall knowledge of ... is strongly desired. Knowledge of the Verilog HDL is preferred. Our culture is... more

Jun 05 Digital ASIC Verification Senior Engineer Seagate Technology Shakopee, MN

Description Languages. Knowledge of the Verilog HDL is preferred. Knowledge of System Verilog is a plus. Qualifications BSEE/BSCS or Master degree preferred. 3-5 years experience... more

May 29 Processor Physical Design Engineer LSI LOGIC Mendota Heights, MN

is strongly favored. . Working knowledge of Verilog, and have programming skills in Perl and TCL scripting languages. . Demonstrate the ability to work through technology... more

Apr 18 Processor Physical Design Engineer LSI LOGIC Mendota Heights, MN

is strongly favored. Working knowledge of Verilog, and have programming skills in Perl and TCL scripting languages. Demonstrate the ability to work through technology challenges... more

Apr 14 Processor Physical Design Engineer LSI LOGIC Mendota Heights, MN

is strongly favored. . Working knowledge of Verilog, and have programming skills in Perl and TCL scripting languages. . Demonstrate the ability to work through technology... more

Mar 28 Sr. DSP ASIC Design Engineer Baytech Solutions Minneapolis, MN

This position requires: Minimum of 8 years of experience in DSP algorithm Verilog/VHDL ... implementation tradeoff analysis, Verilog/VHDL design, behavioral modeling and... more

Jan 10 Sr DSP ASIC Design Engineer Crtechnical Minneapolis, MN

munication baseband processors for 802.11n, 802.11a, 802.11b, 802.11g and related standards. Minimum 8 years Verilog/VHDL design, analysis Strong C, Perl, TCL Familiar with... more