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Mar 09 Logic Design Engineer - Verilog - VHDL - Algorithm - Storage - SSD - DRAM - SRAM Cybercoders La Jolla, CA

Design Engineer - Verilog - VHDL - Algorithm - Storage - SSD - DRAM - SRAM near La Jolla, CA This job is open as of 3/8/2010. Apply Now! Not a fit for this job? Search other Logic... more

Mar 09 ASIC Architect - RTL - Logic - Verilog - VHDL - Algorithm - SSD - Solid State - DRAM - SRAM Cybercoders San Diego, CA

Architect - RTL - Logic - Verilog - VHDL - Algorithm - SSD - Solid State - DRAM - SRAM near San Diego, CA This job is open as of 3/8/2010. Apply Now! Not a fit for this job?... more

Mar 09 FPGA Engineer - Xilinx - Verilog - C/C++ - Ethernet - TCP/IP - PCIe - PCI Express - DDR - SDRAM Cybercoders New York, NY

FPGA Engineer - Xilinx - Verilog - C/C++ - Ethernet - TCP/IP - PCIe - PCI Express - DDR - SDRAM near New York City, NY This job is open as of 3/8/2010. Apply Now! Not a fit for... more

Mar 09 Senior ASIC Engineer - DSP - ASIC design - RTL - 802.11 - VLSI Cybercoders Minneapolis, MN

this position: - 8+years of experience in Verilog/VHDL design, analysis, behavioral ... ASIC Design Engineer with DSP Algorithm and Verilog/VHDL experience, please apply today!... more

Mar 09 Senior ASIC Engineer - DSP - ASIC design - RTL - 802.11 - VLSI Cybercoders Minneapolis, MN

this position:- 8+years of experience in Verilog/VHDL design, analysis, behavioral ... ASIC Design Engineer with DSP Algorithm and Verilog/VHDL experience, please apply today!... more

Mar 09 Senior Software/Firmware Engineer Silicon South Orange, CA

FPGAs and CPLDs are mainly done in VHDL or Verilog.*VHDL/Verilog is also for ASIC design.*DSPs will be usually programmed in C or C++.*Programming for FPGAs, CPLDs, and DSPs are... more

Mar 09 Senior Mixed Signal Design Engineer- Contract Silicon South San Diego, CA

p-amps, regulators, bandgap references, charge pumps, PLL blocks, DACs, ADCs, biasing circuits, etc..Experience with Mentor IC design tools, Verilog or VHDLExcellent written &... more

Mar 09 HAH - IC Design Engineer 2 (College) Analog Devices Wilmington, MA

responsibilities will include: o Verilog RTL design and verification o Logic synthesis and post-layout static timing analysis o Optimization for area and power o Top-level... more

Mar 09 Systems Engineer 4 - SADIL Facility Northrop Grumman Colorado Springs, CO

rrent top secret clearance, with current SSBI required. Preferred Qualifications: Experience in GNU Software Defined Radio and USRP, and Verilog / FPGA development is also... more

Mar 09 Senior Signal Integrity Engineer 3par Fremont, CA

Knowledge of tools such as SPICE or Verilog-A/AMS , Matlab or Perl scripts, CST MWS or HFSS 3D field solver Knowledge of Allegro PCB tool Knowledge lab testing equipments such as... more

Mar 09 Functional Verification Manager Micron Technology San Jose, CA

Qualifications: - well versed in verilog, SVA, VMM or OVM. - 10+ years of verification experience - software programming experience, C/C++/Perl/Unix/php - extensitve experience... more

Mar 09 Senior Hardware/Firmware Engineer Silicon South Orange, CA

FPGA design and implementationVHDL and/or Verilog backgroundProgramming experience in "C", "C++" and Assembly LanguageHigh-speed IO design (video experience highly... more

Mar 09 Sr. Electrical Engineer Silicon South Orange, CA

electronic design with FPGA, VHDL or Verilog, circuit simulations, and noise analysis.Knowledge of CMOS driver & circuit design and electronic control systems a big plus.Full... more

Mar 09 Mixed Signal IC Designer TAC Austin, TX

analog circuitry Semiconductor VHDL Verilog Voltage references ** Note Candidates MUST be U.S. Canadian Citizen or current Green Card Holders*** ABOUT TAC WORLDWIDE COMPANIES... more

Mar 09 ASIC Designer TAC Austin, TX

years of commercial experience *lt;brgt;Verilog for RTL coding *lt;brgt;Synopsis logic synthesis *lt;brgt;Digital ASIC design flow (specification topology RTL verification DFT... more

Mar 09 Engineer, Sr Siemens Business Services Mountain View, CA

HW design or board level debug experience- Verilog experience a plus- Debugging skills using O-scope, Spectrum Analyser, Network analyser, etc. Salary:... more

Mar 09 Sr. DFT Engineer Sandforce Saratoga, CA

in DFT / design Strong logic Design, Verilog RTL and verification back ground with experience in STA utilizing industry standard tools Must possess a strong knowledge of DFT... more

Mar 09 Platforms Storage FPGA/ASIC Design Infrastructure Engineer Google Mountain View, CA

design and verification (FPGA/ASIC) Strong Verilog & SystemVerilog knowledge, Strong RTL design validation skills Experience with several scripting languages (e.g. Perl, Bash,... more

Mar 09 ASIC Logic/Verification Engineer HP Texas

design team is responsible for writing RTL (Verilog) and creating algorithms which implement the chipset architecture. The team consists of hardware and software engineers with an... more

Mar 09 ASIC Logic/Verification Engineer HP Richardson, TX

design team is responsible for writing RTL (Verilog) and creating algorithms which implement the chipset architecture. The team consists of hardware and software engineers with an... more

Mar 09 Hardware Board Design Engineer Cisco Systems San Jose, CA

technologies a plus - Knowledge of RTL (Verilog) and FPGA/PLD design, and/or knowledge on analog / power design a plus - Familiarity with designing in a unix environment - BS EE... more

Mar 08 Logic Design Engineer - Verilog - VHDL - Algorithm - Storage - SSD - DRAM - SRAM Cybercoders La Jolla, CA

Design Engineer - Verilog - VHDL - Algorithm - Storage - SSD - DRAM - SRAM near La ... - DRAM - SRAM Required Skills RTL, Logic, Verilog, VHDL, SystemVerilog, Data... more

Mar 08 Digital Design -RTL - Logic - Verilog - VHDL - Algorithm - Storage - SSD - DRAM - SRAM - DSP Cybercoders La Jolla, CA

Description Digital Design -RTL - Logic - Verilog - VHDL - Algorithm - Storage - SSD - ... - SRAM - DSP Required Skills RTL, Logic, Verilog, VHDL, SystemVerilog, Data... more

Mar 08 ASIC Architect - RTL - Logic - Verilog - VHDL - Algorithm - SSD - Solid State - DRAM - SRAM Cybercoders San Diego, CA

Description ASIC Architect - RTL - Logic - Verilog - VHDL - Algorithm - SSD - Solid ... - DRAM - SRAM Required Skills RTL, Logic, Verilog, VHDL, SystemVerilog, Data... more

Mar 08 FPGA Engineer - Xilinx - Verilog - C/C++ - Ethernet - TCP/IP - PCIe - PCI Express - DDR - SDRAM Cybercoders New York, NY

Short Description FPGA Engineer - Xilinx - Verilog - C/C++ - Ethernet - TCP/IP - PCIe - ... - DDR - SDRAM Required Skills Xilinx, Verilog, C/C++, Ethernet, TCP/IP, FPGA... more

Mar 08 FPGA Design Engineer - Local Candidates Only. Active Soft San Jose, CA

of logic design, RTL coding (verilog/System Verilog), CDC/Lint Experience/knowledge in networking/Ethernet protocols highly desirable Experienced in design using PCIe mandatoryJob... more

Mar 08 FPGA/ASIC Design Verification Engineer - Local Candidates Only Active Soft San Jose, CA

Experienced and highly skilled in System Verilog and C++ languages Experienced in all aspects of writing simulation environments and behavioral models Experience/knowledge in... more

Mar 08 ASIC Design Engineer Marvell Semiconductor Santa Clara, CA

design, verification using assembly lang, Verilog, Perl script & simulation tools. Must pass co's tech review. Send resumes to K. Quach, Job Ref 391, Marvell Semiconductor, Inc. more

Mar 08 Principal ASIC Design Engineer Fusion408 San Jose, CA

timing analysis, RTL coding using Verilog, & synthesis. ? Interface with ... MSEE is required along with at least 5 yrs Verilog ASIC Design ? Solid understanding of... more

Mar 08 Digital Verification Engineer Fusion408 San Jose, CA

experience ? Solid understanding of C, hdl, Verilog, C++, & SystemC ? SystemVerilog knowledge is plus ? Previous experience working with DSP verification is another plus. ? Basic... more

Mar 08 ASIC Development Engineer Spec Writer LSI Colorado

through interviewing engineers, examining Verilog code, and running simulations. ... analytical/debugging skills Knowledge of Verilog or VHDL design languages Knowledge... more

Mar 08 Sr FPGA Verification Engineer Intuitive Surgical Sunnyvale, CA

and/or ASICsMinimum 8 years experience with Verilog HDL or VHDLSubstantial experience ... pseudo-random verification, System Verilog and assertion based verification are... more

Mar 08 System Engineer 133594 Sapphire Technologies Chandler, AZ

to Have): Ability to read and understand Verilog, and any additional knowledge or experience in media processing (graphics, video processing etc) will be an advantage we can use... more

Mar 08 Sr. Electrical Engineer - ASIC Verification Rockwell Collins Cedar Rapids, IA

C, C++, Object-Oriented Coding, or System Verilog, familiar with VHDL, or Verilog. Candidate must possess a strong problem solving and architectural experience to create... more

Mar 08 Sr. R&D Engineer II Synopsys Sunnyvale, CA

Familiarity with Verilog (or VHDL) and Perl/shell/tcl/c programming skills are required. Familiarity with software development and testing methodologies is a strong plus. Strong... more

Mar 08 Hard IP DFX Lead Intel Folsom, CA

Post-Si Debug techniques - Experience with Verilog* and/or System Verilog* is a plus Job Category : Engineering Primary Location : USA-Arizona, Phoenix Other Locations :... more

Mar 08 Hard IP DFX Lead Intel Santa Clara, CA

Post-Si Debug techniques - Experience with Verilog* and/or System Verilog* is a plus Job Category : Engineering Primary Location : USA-Arizona, Phoenix Other Locations :... more

Mar 08 Hard IP DFX Lead Intel Phoenix, AZ

Post-Si Debug techniques - Experience with Verilog* and/or System Verilog* is a plus Job Category : Engineering Primary Location : USA-Arizona, Phoenix Other Locations :... more

Mar 08 Engineer, Senior Hardware Design St. Jude Medical Sunnyvale, CA

analysis and digital design including Verilog RTL coding and verification test bench development and simulation. Other valued skills include synthesis, static timing analysis, and... more

Mar 08 Sr. ASIC Engineer Cybercoders Minneapolis, MN

ASIC Design Engineer with DSP Algorithm and Verilog/VHDL experience, please read on! ... this position: - 8+years of experience in Verilog/VHDL design, analysis, behavioral... more

Mar 08 Sr. ASIC Engineer Cybercoders Bloomington, MN

ASIC Design Engineer with DSP Algorithm and Verilog/VHDL experience, please read on! ... this position: - 8+years of experience in Verilog/VHDL design, analysis, behavioral... more

Mar 08 Engineering Juniper Networks Sunnyvale, CA

#8977: Develop unit-level RTL models using Verilog. Write test benches for ASICs using SystemC, C++, & Verilog. Software Engineer #5448: Develop & maintain IP routing & MPLS... more

Mar 08 Engineering Juniper Networks Sunnyvale, CA

#8977: Develop unit-level RTL models using Verilog. Write test benches for ASICs using SystemC, C++, & Verilog. Software Engineer #5448: Develop & maintain IP routing & MPLS... more

Mar 08 Software/Hardware Design Engineer Keynote Systems Seattle, WA

FPGA design skills using VHDL preferred Verilog is ok. Mentor Graphics tool flow is a plusAbility to work in a fast paced, startup-like environmentSuperior verbal and written... more

Mar 08 Graduate Intern Technical Intel Hillsboro, OR

simulation knowledge 4. Knowledge of verilog, RTL simulation 5. CAD experience with tool development 6. Excellent design, problem-solving, and debug skills 7. A self starter with... more

Mar 07 Digital, ASIC Design Engineer, Verilog Design Chip Source Seattle, WA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Verilog Engineer C Programming FPGA Xilinx Verilog New Hampshire, OH

Verilog Engineer C Programming FPGA Xilinx Verilog Job Code: Job Location: NYC, NY ... Simulation, Place & Route, DDR, SDRAM Verilog Engineer - Xilinx - Verilog - C... more

Mar 07 ASIC Design RTL Logic Verilog VHDL Algorithm Storage San Diego, CA

Position Title: ASIC Design RTL Logic Verilog VHDL Algorithm Storage Job Code: Job ... functions & Error correction algorithms - Verilog/VHDL coding, Synthesis, Formal... more

Mar 07 ASIC Design RTL Logic Verilog VHDL Algorithm Storage San Diego, CA

Position Title: ASIC Design RTL Logic Verilog VHDL Algorithm Storage Job Code: Job ... functions & Error correction algorithms - Verilog/VHDL coding, Synthesis, Formal... more

Mar 07 Verilog Engineer - FPGA - Xilinx - C/C++ - Ethernet - TCP/IP - PCIe - DDR - Hardware Engineer Cybercoders New York, NY

Verilog Engineer - FPGA - Xilinx - C/C++ - Ethernet - TCP/IP - PCIe - DDR - Hardware ... - Hardware Engineer Required Skills Xilinx, Verilog, C/C++, Ethernet, TCP/IP, FPGA... more

Mar 07 ASIC Design - RTL - Logic - Verilog - VHDL - Algorithm - Storage - SSD - Solid State - DRAM - SRAM Cybercoders Del Mar, CA

Description ASIC Design - RTL - Logic - Verilog - VHDL - Algorithm - Storage - SSD - ... - DRAM - SRAM Required Skills RTL, Logic, Verilog, VHDL, SystemVerilog, Data... more

Mar 07 ASIC VERIFICATION ENGINEER Terran Systems San Jose, CA

specifications- Experience with system Verilog, formal checking tools & assertions ... languages: C/C++, PERL- Experience with Verilog, common RTL simulation &... more

Mar 07 ASIC Verification Sr. Staff Conexant Waltham, MA

Country : United States Job Requirements : Verilog and C++ (or Object Oriented ... Verilog) required. Experience with OVM/VVM, Verilog Assertions, Functional coverage,... more

Mar 07 Digital, ASIC Design Engineer, Concept through Production Chip Source Atlanta, GA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Define Novel Product Designs Chip Source Boston, MA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Full Time Opportunity Chip Source Fremont, CA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer Chip Source Albany, NY

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Concept through Validation Chip Source Austin, TX

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Design of SoCs Chip Source Dallas, TX

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Hands-On Opportunity Chip Source Irvine, CA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Micro-Architecture Chip Source Minneapolis, MN

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Novel Architectures Chip Source Portland, OR

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Support Technology Transfer Chip Source San Diego, CA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 FPGA Engineer Intel Santa Clara, CA

ing, Job ID: Chip20013, LOC: Santa Clara, Experience with complete ASIC cycle including micro-architecture, design implementation using Verilog, logic synthesis, logic... more

Mar 07 Digital, ASIC Design Engineer, Circuit Design Chip Source Allentown, PA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Define New Products Chip Source Baltimore, MD

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Design, Simulate, Verify Chip Source Denver, CO

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, IC Design Chip Source Los Angeles, CA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Multiple Circuit Design Projects Chip Source Newark, NJ

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Semiconductors Chip Source Raleigh, NC

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Verification of Integrated Circuits Chip Source San Jose, CA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Integrated Circuit Design Chip Source Miami, FL

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, New Product Development Chip Source Phoenix, AZ

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 Digital, ASIC Design Engineer, Semiconductors, Complex Designs Chip Source Sacramento, CA

icro-architecture. Develop and implement block level RTL, Synthesis, Timing, and Chip architecture. Participate in design of communications SoCs. Verilog design and verification... more

Mar 07 E1441:Electrical Engineer Asc Lockheed Martin Florida

ties, components, products, and systems for commercial, industrial, and domestic purposes. Skill in analog design, CAD in Mentor Graphics, Verilog (or similar CAD tools) Ability... more

Mar 07 ASIC Design and Verification Engineer Terran Systems San Jose, CA

bench- Test case development using VERA/VERILOG- Design/Develop models for test ... protocols of 802.3- Experience with Verilog, Vera verification environment,... more

Mar 07 ASIC Design / Verification Engineer Koa Networks San Jose, CA

The candidate is expected to be fluent in Verilog, C/C++, and PERL. Familiarity with ... of experience is required. verilog, system verilog, "verification engineer"... more

Mar 07 Intern SW Engineer Cadence Design Systems Chelmsford, MA

Area:Engineering Cost Center:Next Gen Verilog Position Type:Intern Education Required:Not Indicated Experience Required:None Relocation... more

Mar 07 FPGA Design and Verification Engineer Johnson Service Group Alpharetta, GA

on (ModelSim, Active-HDL), and verification (transaction based test-benches, assertions, code coverage). Component modeling (VITAL), System Verilog and/or PSL, DO-254, and... more

Mar 07 Read Channel Verification Engineer LSI Allentown, PA

verification flow. Experience with System Verilog and functional coverage ... including functional coverage using System Verilog and be able to initiate and drive... more

Mar 07 Principal IC Design Engineer Broadcom San Jose, CA

of RTL hardware implementations in Verilog - Synthesis, gate level simulation, ... Write test benches in Verilog and/or higher level languages like System Verilog or... more

Mar 07 ASIC Verification Engineer - Acceleration Broadcom Santa Clara, CA

engaged in chip design verification using Verilog simulators, C models, and hardware ... with Perl, Linux/UNIX Expertise with Verilog Expertise with major industry RTL... more

Mar 07 Sr. Digital IC Design Engineer San Diego, CA

and simulation is a plus including Verilog, Verilog-A, Verilog-AMS, and Virtuoso AMS Designer *Experience or knowledge in the design of digital PLLs, clock, and data recovery is a... more

Mar 07 Design Verification Engineer Cirrus Logic Austin, TX

with system verification.? Proficiency in Verilog and Shell Scripting.? Experience with FPGA design.? Efficient debugging skills in lab and bench environment using Labview.?... more

Mar 07 Design Engineer (SERDES/Mixed Signal) Lattice Semiconductor San Jose, CA

with digital/behavioral simulators such as Verilog and Verilog-A. Demonstrated capacity to work successfully with minimal direction. Strong written and verbal communication skills... more

Mar 07 Verification Engineers - Jr to Sr Level Symphony Services Engineering Boston, MA

testgenerators, developing System Verilog/C/assembly tests, analyzing coverage ... generation products. Skills: Experiencewith Verilog, SystemVerilog, HDL, programming in... more

Mar 07 Hardware Developer 4 Oracle Burlington, MA

random sparc assembly tests and/or system verilog tests; Develop verification ... verification experience Verilog, System verilog, perl, microprocessor and cache... more

Mar 07 Sr. Electrical Engineer - ASIC Verification Rockwell Collins Cedar Rapids, IA

C, C++, Object-Oriented Coding, or System Verilog, familiar with VHDL, or Verilog. Candidate must possess a strong problem solving and architectural experience to create... more

Mar 07 Sr DFT Design Engineer LSI Colorado

Knowledge of Verilog and/or VHDL (System Verilog is a plus) Proficient in commercial EDA tools (Synopsys DFT Compiler, Tetramax, Logic Vision, PrimeTime, ncSim, VCS) Knowledge of... more

Mar 07 Sr Design Verification Engineer LSI Colorado

Knowledge of Verilog and/or VHDL (System Verilog is a plus). Proficient in commercial EDA tools (Cadence IUS, Mentor Modelsim, Synopsys VCS, Verdi, Primetime, DFT compiler,... more

Mar 07 E1784:Sys Integratn/Test Eng Stf Lockheed Martin California

FPGA design especially desirable (Verilog/VHDL). Minimum of a BS in Physics, Electronics, or other engineering/science discipline with the breadth to encompass these disciplines. more

Mar 07 Definition Architect AMD Austin, TX

gement, and general software design is desirable. The candidate must have excellent written and verbal communications skills. Knowledge of Verilog, programming languages, IC... more

Mar 07 Electrical Engineer Medtronic Redmond, WA

assessment, requirements capture, Verilog coding, part selection, high level ... design, detailed design, schematic entry, Verilog coding, simulation, layout... more

Mar 07 ASIC Verification Engineer - Acceleration Broadcom Santa Clara, CA

engaged in chip design verification using Verilog simulators, C models, and hardware ... with Perl, Linux/UNIX Expertise with Verilog Expertise with major industry RTL... more

Mar 07 Digital Design Engineer Cirrus Logic Austin, TX

at Cirrus Logic. They can write the Verilog code for an IIR filter backwards. Design for test, verification and validation Please, our chips are afraid to fail. Many of our IC... more

Mar 07 Staff Hardware Engineer - 484598 Digimarc Beaverton, OR

* Strong skills in coding RTL in VHDL and Verilog * Good skills in C/C++ * Experience with synthesis for FPGA and ASIC * Excellent written and verbal communication skills *... more

Mar 07 Hardware Engineer Network Technologies Cleveland, OH

Design experience with FPGAs using VHDL or Verilog is desired- Experience designing hardware for microprocessors, digital data communications design, high speed switching design,... more

Mar 07 Principal IC Design Engineer Broadcom Irvine, CA

Write and read RTL in Verilog and/or VHDL. Coding in scripting languages such as TCL, Perl and UNIX shell. - Hands on experience with following layout design tools (in order of... more

Mar 06 ASIC Design - RTL - Logic - Verilog - VHDL - Algorithm - Storage - SSD - Solid State - DRAM - SRAM Cybercoders La Jolla, CA

Description ASIC Design - RTL - Logic - Verilog - VHDL - Algorithm - Storage - SSD - ... - DRAM - SRAM Required Skills RTL, Logic, Verilog, VHDL, SystemVerilog, Data... more

Mar 06 Senior Logic Design Engineer - Verilog - VHDL - Algorithm - Storage - SSD - DRAM - SRAM Cybercoders La Jolla, CA

Logic Design Engineer - Verilog - VHDL - Algorithm - Storage - SSD - DRAM - SRAM ... - DRAM - SRAM Required Skills RTL, Logic, Verilog, VHDL, SystemVerilog, Data... more