Verilog jobs
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| Sep 03 | Senior Logic Design Engineer RTL Analog Verilog | California | |
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- Logic Design, Digital Design, Analog, Verilog, Schematic Capture, Spice ... Design Engineer with Analog Circuitry, Verilog, and Gate-Level experience, please... more |
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| Sep 03 | RFIC Design Engineer RFIC Spectre Verilog Virtuoso | California | |
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forRFIC Design Engineer RFIC Spectre Verilog Virtuoso * Address:Santa Clara, CA ... Title: RFIC Design Engineer RFIC Spectre Verilog Virtuoso Job Code: Job Location:... more |
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| Sep 03 | Verilog Design Engineer | Washington | |
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Technical Skills: Verilog Designing ADE MATLAB C++ Microarchitecturing... more |
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| Sep 03 | Senior Verilog Design Engineer | New York, NY | |
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Technical Skills: pCell development Linux/Unix RF/Mixed Signal IC designs Verilog Designing MFC... more |
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| Sep 03 | Verilog Verification Engineer | Seattle, WA | |
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Technical Skills: PRE runset development SSD processors Chip Design MATLAB chip integration... more |
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| Sep 03 | Engineer, I - IC Design | Broadcom | Sunnyvale, CA |
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* VHDL/Verilog, C/C++ and Perl programming skills and also various simulation tools.* Candidate must be a self-starter and must be able to work independently and in a team... more |
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| Sep 03 | Engineer, Principal - IC Design Verification | Broadcom | Longmont, CO |
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coverage, HW/SW co-simulation; Verilog, Verilog PLI, VMM & SV assertions. - Proficient in Verilog/VHDL RTL design/simulation. - Working knowledge of C/C++, matlab, perl, tcl or... more |
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| Sep 03 | VERIFICATION ENGINEER/MXSD PRODUCTS | California | |
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and executing the test plan using System Verilog for next generation Mixed-Signal ... Execute verification plan using Systems Verilog/Verilog using both direct and random... more |
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| Sep 03 | Lead Verification Engineer Principal Verification Engineer | California | |
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Engineer, OTN, OTU, Test Plans, VHDL, Verilog, System Verilog, Specman, TCL, eRM, ... communication protocols - Experience using Verilog/VHDL, System Verilog, and/or... more |
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| Sep 03 | Verification Engineer | AMD | Austin, TX |
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- Significant experience with Verilog, C/C++, Perl, and logic simulation is a requirement. - Experience with SystemVerilog/OVM is a plus. - Requires very strong understanding of... more |
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| Sep 03 | Verification Engineer | AMD | Boxborough, MA |
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- Significant experience with Verilog, C/C++, Perl, and logic simulation is a requirement. - Experience with SystemVerilog/OVM is a plus. - Requires very strong understanding of... more |
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| Sep 03 | Sr. ASIC Design Engineer - IC Design | Pittsburgh, PA | |
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3 - 8 years of experience in Verilog/VHDL design, analysis and verification for a process ... and ASIC design flow. - Experience with Verilog and Synopsys tools (VCS, DC, Power... more |
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| Sep 03 | RFIC Design Engineer RFIC Fractional N Frequency Synthesizer | California | |
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N Frequency Synthesizer - Spectre - Verilog - Virtuoso - Skills Required - RFIC, ... tools from Cadence; specifically Spectre, Verilog, Spectre Verilog, Virtuoso, Virtuoso... more |
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| Sep 03 | Senior DFT Engineer Design For Test mBIST | California | |
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JTAG, Scan Insertion, ATPG, Logic Design, Verilog RTL, Verification, STA, Boundary ... - Strong experience in Logic Design, Verilog RTL, Verification, and Static Timing... more |
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| Sep 03 | Sr. ASIC Verification Engineer - Design Verification | Pittsburgh, PA | |
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3 - 8 years of experience in Verilog/VHDL design verification and test environment ... code coverage, - - HW/SW co-simulation; Verilog, Verilog PLI, VMM & SV assertions,... more |
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| Sep 03 | Sr Design Engineer | AMD | Boxborough, MA |
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- Strong background in C/C++ - Experience in Verilog/SystemVerilog - Experience working with Synopsys VCS and waveform viewers - Working knowledge of UNIX/Linux operating systems... more |
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| Sep 03 | Engineer, Staff Layout | Marvell Technology Group | Santa Clara, CA |
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tools such as Spectre, Spice, Matlab, Hsim, Verilog, etc A thorough understanding of the physical layout requirement and ability to perform the critical layouts Lab testing skills... more |
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| Sep 03 | tbd | AMD | Boxborough, MA |
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- Strong background in C/C++ - Experience in Verilog/SystemVerilog - Experience working with Synopsys VCS and waveform viewers - Working knowledge of UNIX/Linux operating systems... more |
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| Sep 03 | Engineer, Staff | Silicon Image | Sunnyvale, CA |
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Expertise with all phases of ASIC desgin, Verilog coding, verification, synthesis, DFT ... primetime EDA tools. Proficient in verilog, TCL and PERL languages. Should know... more |
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| Sep 03 | Security Verification Engineer | Intel | Phoenix, AZ |
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-Exposure to RTL design, Specman, Verilog, System Verilog, VCS, and other front-end design and verification tools, a plus. - UNIX and scripting languages (TCL, Perl and others)... more |
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| Sep 03 | Validation Engineer | Intel | Phoenix, AZ |
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hardware description language (VHDL and/or Verilog*) models for prototype environments ... a hardware description language (VHDL or Verilog) - Experience with FPGA's or... more |
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| Sep 03 | Security RTL Design | Intel | Phoenix, AZ |
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functional blocks. - RTL design, Specman, Verilog, System Verilog, VCS, and other front-end design and verification tools. - UNIX* and scripting languages (TCL, Perl and others)... more |
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| Sep 03 | Engineering Intern | Intel | Austin, TX |
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Perl - RTL design using Verilog or System Verilog, RTL simulation and analysis tools, synthesis, and timing analysis/convergence - actual design experience in an industrial design... more |
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| Sep 03 | Engineering Intern | Intel | Santa Clara, CA |
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Perl - RTL design using Verilog or System Verilog, RTL simulation and analysis tools, synthesis, and timing analysis/convergence - actual design experience in an industrial design... more |
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| Sep 03 | Sr. Digital IC Design Engineers (PMIC) | San Diego, CA | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management *PMICS is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | Sr. Digital IC Design Engineers (PMIC) | Austin, TX | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management PMICS is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | Sr. Digital IC Design Engineers (PMIC) | California | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management *PMICS is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | Sr. Digital IC Design Engineers (PMIC) | San Diego, CA | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management *PMICS is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | Sr. Digital IC Design Engineers (PMIC) | California | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management *PMICS is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | Senior Digital IC Design Engineers (PMIC) | California | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management *PMICS is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | Senior Digital IC Design Engineers (PMIC) | California | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management *PMICS is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | RF IC Design Engineer Analog IC Designer, CMOS RF Transceiver | California | |
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CMOS, BiCMOS, transceiver, Cadence, DSP, Verilog, signal processing, CMOS RF ... C/C++ and other behavior modelling tool. Verilog experience is a plus - Strong... more |
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| Sep 03 | Hardware Engineer-Senior-Xbox Hardware-Silicon Job | Microsoft | Mountain View, CA |
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implementing many of those test plans using Verilog and C'. Additionally, the candidate ... verification experience using both C and Verilog languages Other skills needed to be... more |
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| Sep 03 | Verification Engineer-Principal-Xbox-Silicon (722463) Job | Microsoft | Mountain View, CA |
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implementing many of those test plans using Verilog and C'. Additionally, the candidate ... verification experience using both C and Verilog languages Other skills needed to be... more |
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| Sep 03 | Mixed-Signal Design Engineer | Analog Devices | Wilmington, MA |
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HSPICE, Spectre) and VHDL (e.g. VHDL, Verilog); testing, micro-probing and debugging integrated circuits; developing circuitry for bench, micro-probing, or ATE testing of... more |
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| Sep 03 | ASIC Design Engineer | Marvell Technology Group | Santa Clara, CA |
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ide design documentation, descriptions and information to application engineers, field application engineers, product engineers, and customers. Key words: DSP , circuit , verilog... more |
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| Sep 03 | Pre-Silicon Validation | Intel | Austin, TX |
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verification - 3+ years experience in Perl, Verilog and SystemVerilog Job Category : Engineering Primary Location : USA-Texas, Austin Full/Part Time : Full Time Job Type :... more |
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| Sep 03 | Intern Component Design Engg | Intel | Folsom, CA |
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Design Compiler, Synopsys* Primetime*, Verilog* Register Transfer Level (RTL) language and Perl scripting Job Category : Engineering Primary Location : USA-California, Folsom... more |
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| Sep 03 | Associate Hardware FPGA Engineer - college grad | Spirent Communications | Honolulu, HI |
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Design work typically includes coding in Verilog, constraint definition, simulation, and routing. 2. The Hardware engineer will also be responsible for support of FPGAs used on... more |
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| Sep 03 | FPGA Verification Engineer | San Francisco, CA | |
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verification environment that is based on Verilog and C Make enhancements to BFM and ... of experience Extensive experience using Verilog, C, perl to build verification... more |
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| Sep 03 | Lead Design/Manager of Digital Design | Austin, TX | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management PMICs is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | Technical Lead/Digital IC Design Engineer | California | |
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in Digital Design with at least 5+ years in Verilog/Synthesis-based ASIC Design ... power management PMICs is highly desired *Verilog language and simulation verification... more |
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| Sep 03 | Design Engineer FPGA | Los Angeles, CA | |
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Video Transport, Digital Video, H.264, Verilog-VHDL, PCB Layout, Element Management ... to completion * Writing FPGA code using Verilog or VHDL * Designing - Analog video,... more |
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| Sep 03 | Software/Firmware Engineer | COMSYS | Wilsonville, OR |
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proficiency in LabView, C, C++ and Verilog Coding Understanding or proficiency in designing/developing a calibration system for a printer based electrical / mechanical print... more |
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| Sep 03 | Sr FPGA Verification Engineer | California | |
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or VHDL Substantial experience with System Verilog Experience with various programming ... pseudo-random verification, System Verilog and assertion based verification are... more |
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| Sep 02 | Senior Logic Design Engineer -RTL - Analog - Verilog - Gate-Level | Cybercoders | Milpitas, CA |
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Logic Design Engineer -RTL - Analog - Verilog - Gate-Level near Milpitas, CA This ... Search other Senior Logic Design Engineer - Verilog - Analog jobs! Are you an employer?... more |
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| Sep 02 | Verilog Verification Engineer | Chicago, IL | |
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Technical Skills: Verilog Designing chip integration Analog DRC development Electronic components Devleopment C... more |
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| Sep 02 | Senior Verilog Design Engineer | Atlanta, GA | |
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Technical Skills: SSD processors MFC LVS development RF/Mixed Signal IC designs PRE runset development... more |
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| Sep 02 | Verilog Design Engineer | New York, NY | |
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Technical Skills: pCell development ADE TCL Cadence RF/Mixed Signal IC designs... more |
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| Sep 02 | RFIC Design Engineer - RFIC - Fractional N Frequency Synthesizer - Spectre - Verilog - Virtuoso | Cybercoders | Irvine, CA |
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N Frequency Synthesizer - Spectre - Verilog - Virtuoso near Irvine, CA This job is open as of 9/1/2010. Apply Now! Not a fit for this job? Search other Principal RFIC Design... more |
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| Sep 02 | Senior RFIC Design Engineer - RFIC - Spectre - Verilog - Virtuoso - WiMAX - Wireless - 802.16 | Cybercoders | Santa Clara, CA |
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RFIC Design Engineer - RFIC - Spectre - Verilog - Virtuoso - WiMAX - Wireless - 802.16 near Santa Clara, CA This job is open as of 9/1/2010. Apply Now! Not a fit for this job?... more |
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| Sep 02 | Chip Level Verification | Global Techforce | Irvine, CA |
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chip and block level test bench in System Verilog environment. -Define test plan and ... Qualifications: -Experience in System Verilog or an equivalent verification... more |
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| Sep 02 | Senior Digital Design Engineer | Modicom | Sunnyvale, CA |
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NC-Verilog - Analog circuit modeling using Verilog - Own pre-layout synthesis and ... gates of digital/mixed-signal design using Verilog or VHDL. - Led a small technical... more |
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| Sep 02 | Principal Digital Design Engineer | Modicom | Los Angeles, CA |
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NC-Verilog - Analog circuit modeling using Verilog - Own pre-layout synthesis and ... gates of digital/mixed-signal design using Verilog or VHDL. - Led a small technical... more |
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| Sep 02 | Firmware Engineer | Infogroup Northwest | Portland, OR |
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Title: Firmware Engineer Skills: C/C++, Verilog, and Labview Date: 8-25-2010 Description: Infogroup Northwest is a premier IT Staffing Firm for some of Portland's top Mid Sized... more |
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| Sep 02 | Principal Emulation/ FPGA Design Engineer | Broadcom | Irvine, CA |
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needs to be proficient in FPGA design using Verilog. Solid hands-on designer able to debug digital hardware circuits using lab equipments oscilloscopes, logic analyzers, etc... more |
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| Sep 02 | ASIC Designer | Research In Motion | Redwood City, CA |
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system integration in VHDL (primary) and Verilog (secondary) * Algorithm ... and verification (TCL, System C, System Verilog, Modelsim SE) * Emulation debug and... more |
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| Sep 02 | ASIC Designer | Research In Motion | San Jose, CA |
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system integration in VHDL (primary) and Verilog (secondary) * Algorithm ... and verification (TCL, System C, System Verilog, Modelsim SE) * Emulation debug and... more |
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| Sep 02 | Firmware Engineer | Vanderhouwen & Associates | Wilsonville, OR |
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proficiency in LabView, C, C++ and Verilog Coding Requires understanding or proficiency in designing/developing a calibration system for a printer based electrical / mechanical... more |
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| Sep 02 | ASIC Validation Engineer | Modicom | Los Angeles, CA |
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and experience in C++, Perl, Python and Verilog and System Verilog --High level behavior modeling and test bench building --Test plan and test development for at-speed ATE testing... more |
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| Sep 02 | FPGA Altera Xilinx VHDL 7 | Systems Pros | Dallas, TX |
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5-10 years experience neededVHDL Verilog FPGA Altera Xilinx Dxdesigner board level design Apply directly at: http://www.net-temps.com... more |
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| Sep 02 | Firmware Engineer | Infogroup Northwest | Portland, OR |
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Our client is seeking someone with printer experience, C/C++, Verilog, and Labview ... proficiency in LabView, C, C++ and Verilog Coding * Requires understanding or... more |
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| Sep 02 | SSI ASIC Engineer (Frontend) | Samsung Semiconductor | San Jose, CA |
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embedded ASICS Experience with Primetime, Verilog Simulation, DFT Max and Tetra-Max a huge plus! BSEE MSEE preferred Samsung is an Equal Opportunity Employer To Apply for this... more |
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| Sep 02 | RF/Analog Functional Verification Engineer - Senior (San Die | QUALCOMM | San Diego, CA |
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- Extensive hands-on experience using Verilog and VerilogAMS. - Solid knowledge of ... behavioral models and testbenches in Verilog and VerilogAMS. - Hold verification... more |
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| Sep 02 | Staff Verification Engineer | Modicom | Los Angeles, CA |
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- Execute verification plan using SystemVerilog/Verilog using both direct and random test ... - Strong language user in SystemVerilog, Verilog, Perl, Unix Shell. - Done... more |
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| Sep 02 | Electrical Engineer | AES | Atlanta, GA |
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of FPGA/CPLD design using VHDL and/or Verilog Familiarity with analog and power electronics, and relevant design criteria, analysis methods, and test processes for the same... more |
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| Sep 02 | RTL Engineer | Milpitas, CA | |
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Hands on experience with FPGA RTL design Verilog synthesis PAR tools including ... Knowledge of design verification System Verilog Vera Specman a plus 8226 Familiarity... more |
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| Sep 02 | Verification Engineer | Milpitas, CA | |
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in developing system level test cases in verilog and C with PSL assertions Experience ... in developing system level test cases in verilog and C with PSL assertions Total exp... more |
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| Sep 02 | ASIC Verification Engineer, Principal | QLogic | Aliso Viejo, CA |
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ManagementObject Oriented programmingSystem Verilog Verification using a framework such ... test bench Design/Verification Analog Chip: Verilog Design/Verification Analog Chip:... more |
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| Sep 02 | ASIC Verification Engineer, Principal | QLogic | Roseville, CA |
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ManagementObject Oriented programmingSystem Verilog Verification using a framework such ... test bench Design/Verification Analog Chip: Verilog Design/Verification Analog Chip:... more |
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| Sep 02 | ASIC Verification Engineer, Sr. | QLogic | Roseville, CA |
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ManagementObject Oriented programmingSystem Verilog Verification using a framework such ... test bench Design/Verification Analog Chip: Verilog Design/Verification Analog Chip:... more |
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| Sep 02 | ASIC Verification Engineer, Staff | QLogic | Aliso Viejo, CA |
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ManagementObject Oriented programmingSystem Verilog Verification using a framework such ... test bench Design/Verification Analog Chip: Verilog Design/Verification Analog Chip:... more |
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| Sep 02 | ASIC Verification Engineer, Staff | QLogic | Roseville, CA |
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ManagementObject Oriented programmingSystem Verilog Verification using a framework such ... test bench Design/Verification Analog Chip: Verilog Design/Verification Analog Chip:... more |
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| Sep 02 | ASIC Verification Engineer, Principal | QLogic | Aliso Viejo, CA |
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ManagementObject Oriented programmingSystem Verilog Verification using a framework such ... test bench Design/Verification Analog Chip: Verilog Design/Verification Analog Chip:... more |
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| Sep 02 | ASIC Verification Engineer, Principal | QLogic | Roseville, CA |
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ManagementObject Oriented programmingSystem Verilog Verification using a framework such ... bench Design/Verification Digital Chip: Verilog Design/Verification Digital Chip:... more |
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| Sep 02 | Perl Developer | Kaizen Technologies | San Diego, CA |
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years preferred in custom Circuit development.Ability to understand Specification and do the verification by writing directed test benches in Verilog 5+ years experience in CMOS... more |
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| Sep 02 | Senior VLSI Verification Engineer | Audience | Mountain View, CA |
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ASIC/ASSPs SOCs, * Profound knowledge of Verilog (or VHDL) * Direct experience with HDL verification tools and methodologies * Experience with random and directed VLSI... more |
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| Sep 02 | ASIC Verification Engineer, Principal (3676) | QLogic | Aliso Viejo, CA |
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Object Oriented programming System Verilog Verification using a framework such ... Proficient in coding using an HDL such as Verilog, SystemVerilog or VHDL Excellent... more |
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| Sep 02 | Senior Software Engineer | Volt Information Sciences | Austin, TX |
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would be a plus.In depth experience with Hypertransport, and/or DDR memory interfaces and the ability to rapidly learn new ones would be a plus. Verilog RTL design experience is... more |
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| Sep 02 | Principal Hardware Engineer - FPGA, ASIC, Board Design | Modicom | Irvine, CA |
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failures using lab equipment such as logic analyzers, in-circuit emulators, oscilloscopes and digital multi-meters. --Design of CPLDs, FPGAs, and ASICs using Verilog or VHDL a... more |
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| Sep 02 | ASIC Designer | Research In Motion | San Jose, CA |
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system integration in VHDL (primary) and Verilog (secondary) * Algorithm ... and verification (TCL, System C, System Verilog, Modelsim SE) * Emulation debug and... more |
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| Sep 02 | ASIC Verification Engineer, Staff | QLogic | Roseville, CA |
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* Object Oriented programming * System Verilog Verification using a framework such ... plans * Coding using an HDL such as Verilog, SystemVerilog or VHDL * Excellent... more |
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| Sep 02 | ASIC Verification Engineer, Sr. | QLogic | Roseville, CA |
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* Object Oriented programming * System Verilog Verification using a framework such ... plans * Coding using an HDL such as Verilog, SystemVerilog or VHDL * Excellent... more |
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| Sep 02 | ASIC Verification Engineer, Principal | QLogic | Roseville, CA |
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* Object Oriented programming * System Verilog Verification using a framework such ... * Proficient in coding using an HDL such as Verilog, SystemVerilog or VHDL * Excellent... more |
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| Sep 01 | RFIC Design Engineer - RFIC - Spectre - Verilog - Virtuoso | Cybercoders | Santa Clara, CA |
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Design Engineer - RFIC - Spectre - Verilog - Virtuoso Senior RFIC Design Engineer - RFIC - Spectre - Verilog - Virtuoso - WiMAX - Wireless - 802.16 - Skills Required - RFIC,... more |
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| Sep 01 | Verilog Verification Engineer | Houston, TX | |
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Technical Skills: C Verilog Designing MATLAB SSD processors Xilinx ModelSim... more |
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| Sep 01 | Senior Verilog Design Engineer | Los Angeles, CA | |
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Technical Skills: Chip Design pCell development Linux/Unix TCL ADE... more |
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| Sep 01 | Verilog Design Engineer | Boston, MA | |
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Technical Skills: Chip Design MFC C Xilinx ModelSim Linux/Unix... more |
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| Sep 01 | Design and Analysis Engineer 3/4 | Boeing | Everett, WA |
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using RTL level coding of VHDL and Verilog to provide executable specification. ... Provide behavior level and logic level modeling & simulation using VHDL/Verilog,... more |
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| Sep 01 | Multimedia SOC Design Engineer - RTL Design | Freescale Semiconductor | Austin, TX |
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be well versed in RTL coding and System Verilog verification techniques. Candidate ... 8+ years of industry experience with: Verilog simulators. System Verilog. more |
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| Sep 01 | Senior ASIC Design Verification Engineer | Broadcom | Andover, MA |
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Job Requirements : Implementing and maintaining Verilog/C/C++ testbenches and ... Verilog & digital design is a must. System Verilog and DPI experience desirable. The... more |
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| Sep 01 | Engineer, Principal - Systems Design (ASIC/RTL) | Broadcom | Irvine, CA |
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aggressive clocking requirements Write Verilog to meet specifications created by ... Engineering 8+ years of experience Verilog proficiency is critical, including... more |
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| Sep 01 | Engineer, Principal - Systems Design | Broadcom | Irvine, CA |
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Engineering 8+ years of experience Verilog proficiency is required, including experience with RTL simulation tools, such as ncsim or modelsim Knowledge of scripting languages such... more |
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| Sep 01 | Engineer, Staff - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Sep 01 | Engineer, Sr Principal - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Sep 01 | Intern | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Sep 01 | Engineer, Sr Staff - Electronic Design | Broadcom | Irvine, CA |
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Minimum requirements: * Good knowledge of Verilog HDL and experience in behavioral and RTL coding, familiar with ASIC design and verification flow. * Good knowledge of... more |
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| Sep 01 | Intern | Broadcom | Sunnyvale, CA |
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s. Working towards a BS or MS in Electrical Engineering. - Completed basic digital electronic and logic design courses. - Familiar with VHDL/Verilog and Perl programming a big... more |
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| Sep 01 | Staff / Senior Staff ASIC Verification Engineer | Seagate Technology | Shakopee, MN |
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in Hardware Description Languages. Verilog HDL is preferred. Experience ... Unix, Linux, Synopsys Tools, VHDL or Verilog, and C/C++. Experience with flash... more |
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| Sep 01 | ASIC Design Engineer | Intel | Austin, TX |
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speeds. Your primary job responsibilities would include writing exception/error handing FW in C for on-chip processors and writing RTL in Verilog for protocol processing. more |
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