VHDL jobs - Santa Clara, CA
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| Jul 29 | Intern | Broadcom | Sunnyvale, CA |
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Proficiency in VHDL/Verilog, and experience in C/C++, PERL., and TCL. A solid understanding of digital design, communication theory for WCDMA/CDMA, VLSI design and familiarity... more |
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| Jul 29 | Intern | Broadcom | Sunnyvale, CA |
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Proficiency in VHDL/Verilog, and experience in C/C++, PERL., and TCL. A solid understanding of digital design, communication theory for WCDMA/CDMA, VLSI design and familiarity... more |
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| Jul 29 | Intern II | Broadcom | San Jose, CA |
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skills Knowledge of Verilog or VHDL design languages is a must Experience in digital logic design and verification is a must FPGA synthesis experience is a plus, some synthesis... more |
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| Jul 29 | Engineer, Sr Staff - IC Design | Broadcom | Santa Clara, CA |
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ASIC development process including Verilog, VHDL, Unix Scripting, and C. Working experience needs to demonstrate the technical expertise in successful completion of multiple VLSI... more |
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| Jul 29 | Engineer, Staff II - IC Design Verification | Broadcom | Sunnyvale, CA |
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Proficiency in VHDL/Verilog, and experience in C/C++, PERL., and TCL. A solid understanding of digital design, communication theory for WCDMA/CDMA, VLSI design and familiarity... more |
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| Jul 28 | Intern | Broadcom | Sunnyvale, CA |
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Proficiency in VHDL/Verilog, and experience in C/C++, PERL., and TCL. A solid understanding of digital design, communication theory for WCDMA/CDMA, VLSI design and familiarity... more |
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| Jul 28 | Sr. Software Engineer | Atheros Communications | Santa Clara, CA |
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(does not require background in VLSI or VHDL concepts). Qualifications: BSCS/EE or related field 10+ years of experience, but a sharp college recruit would also do well. more |
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| Jul 27 | Design Engineer, MTS | Altera | San Jose, CA |
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a strong background in RTL design, Verilog/VHDL knowledge. Good understanding of software programming principles including proficiency in C/C++ is expected. Some understanding of... more |
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| Jul 27 | Senior PreSi Verification Eng | Intel | Santa Clara, CA |
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development, ModelSim*, coverage analysis, VHDL and/or Verilog*, C , and Perl scripting is also required. - Experience with System Verilog is a must - Experience with complex SoC... more |
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| Jul 27 | Design Engineer | Kawasaki Microelectronics America | San Jose, CA |
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and development including coding in Verilog/VHDL & simulation; perform digital logic design & synthesis & static timing closure ("STA"), add design for testability ("DFT") logic... more |
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| Jul 27 | Staff Verification Engineer | Actel | Mountain View, CA |
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HDL languages System Verilog, Verilog and VHDL Good knowledge of UNIX shell scripting , Perl and TCL scripting Good knowledge and understanding of CMOS device operation and... more |
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| Jul 26 | Design Engineer, MTS | Altera | San Jose, CA |
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a strong background in RTL design, Verilog/VHDL knowledge. ? Good understanding of software programming principles including proficiency in C/C++ is expected. ? Some understanding... more |
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| Jul 26 | Microcontroller Programmer/FPGA HW Engineer | MICE Groups | Redwood City, CA |
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developing solutions on Xilinx FPGA using VHDL or Verilog Familiar with lab equipment such as DMM, Oscilloscope, Logic Analyzer, and Signal Generator Additionally Desired Skills:... more |
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| Jul 26 | FPGA Engineer | Oneten Technologies | Fremont, CA |
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etc. * Experienced with FPGA design using VHDL or Verilog andexperiences with some or all related EDA tools * Flexible, results-oriented problem-solver who requires minimal... more |
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| Jul 26 | Intern | Broadcom | Sunnyvale, CA |
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- Familiar with VHDL/Verilog and Perl programming a big plus. - Some experience with various lab equipment (oscilloscope and logic analyzer, etc.) is even better. Country United... more |
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| Jul 26 | Intern | Broadcom | San Jose, CA |
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skills Knowledge of Verilog or VHDL design languages is a must Experience in digital logic design and verification is a must FPGA synthesis experience is a plus, some synthesis... more |
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| Jul 26 | Intern | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 26 | Engineer, Sr Staff - IC Design | Broadcom | Sunnyvale, CA |
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* VHDL/Verilog, C/C++ and Perl programming skills and also various simulation tools. System verilog is a plus * Candidate must be a self-starter and must be able to work... more |
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| Jul 26 | Engineer, Sr Principal - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 26 | Engineer , Staff I - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 26 | Engineer, Principal - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 26 | Design Engineer | Kawasaki Microelectronics America | San Jose, CA |
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and development including coding in Verilog/VHDL & simulation; perform digital logic design & synthesis & static timing closure ("STA"), add design for testability ("DFT") logic... more |
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| Jul 26 | Engineer, Sr Staff - IC Design | Broadcom | Santa Clara, CA |
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ASIC development process including Verilog, VHDL, Unix Scripting, and C. Working experience needs to demonstrate the technical expertise in successful completion of multiple VLSI... more |
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| Jul 26 | Engineer, Staff II - IC Design | Broadcom | Sunnyvale, CA |
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- Proficient in Verilog/VHDL RTL design/simulation. - Knowledge of chip design methodology. - Working knowledge of C/C++, matlab, perl, tcl or other scripting language is a plus. more |
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| Jul 26 | Engineer, Sr Staff - IC Design | Broadcom | Sunnyvale, CA |
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- Proficient in Verilog/VHDL RTL design/simulation. - Knowledge of chip design methodology. - Working knowledge of C/C++, matlab, perl, tcl or other scripting language is a plus. more |
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| Jul 26 | Engineer, Principal - IC Design | Broadcom | Sunnyvale, CA |
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Highly skilled in Verilog/VHDL RTL design/simulation/verification. Knowledge of chip design methodology, and experience with logic synthesis and timing closure. Knowledge of... more |
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| Jul 26 | Engineer, Staff I - IC Design Verification | Broadcom | Sunnyvale, CA |
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- Proficient in Verilog/VHDL RTL design/simulation. - Working knowledge of C/C++, matlab, perl, tcl or other scripting language is a major plus. - Must be well organized,... more |
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| Jul 26 | Engineer, Staff II - IC Design Verification | Broadcom | Sunnyvale, CA |
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- Proficient in Verilog/VHDL RTL design/simulation. - Working knowledge of C/C++, matlab, perl, tcl or other scripting language is a major plus. - Must be well organized,... more |
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| Jul 26 | Engineer, Sr Staff - IC Design Verification | Broadcom | Sunnyvale, CA |
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- Proficient in Verilog/VHDL RTL design/simulation. - Working knowledge of C/C++, matlab, perl, tcl or other scripting language is a major plus. - Must be well organized,... more |
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| Jul 25 | CAD Engineer - Synthesis | R & R Staffing | San Jose, CA |
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key new methodologies to support Language VHDL/Verilog Synthesis and ... time Timing Analysis essential.Knowledge of VHDL/Verilog desired. Good Understanding of... more |
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| Jul 25 | HAH - Aerospace and Defense Co-op | Xilinx | San Jose, CA |
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with GPA of 3.0 or aboveIntroduction to: VHDL/VerilogLogic fundamentals and FPGA design.Simulation (MTI, VCS, NC-Verilog) and verification techniquesHands-on experience with lab... more |
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| Jul 25 | HAH - Aerospace/Defense System Architect | Xilinx | San Jose, CA |
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A strong background in Logic design (VHDL) and EDK is a must. Excellent written and verbal communication skills are required. Support development of the strategic plan for the... more |
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| Jul 24 | ASIC RTL design engineer | Synapse Design Automation | San Jose, CA |
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processes includingRTLcoding verilog,some vhdl, integration of verilog; Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 5 years of... more |
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| Jul 23 | Design Verification Engineer | Protingent | San Jose, CA |
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and logic analyzer - RTL design (Verilog/VHDL) expertise - Board design expertise is ... Denali, Debussy) - RTL design (Verilog/VHDL) expertise - Experience with designing... more |
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| Jul 23 | EDA Verification Tools FAE | CAE Recruiters | San Jose, CA |
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interaction. ? Expert in Verilog and VHDL, formal verification technology, overall verification flow. ? Solid knowledge of office tools and UNIX operating system. ? Excellent... more |
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| Jul 22 | Staff Verification Engineer | Actel | Mountain View, CA |
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HDL languages System Verilog, Verilog and VHDL Good knowledge of UNIX shell scripting , Perl and TCL scripting Good knowledge and understanding of CMOS device operation and... more |
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| Jul 21 | Engineer, Senior Digital Design | Marvell Technology Group | Santa Clara, CA |
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algorithm with the RTL, such as Verilog or VHDL, and be knowledgeable on the mixed-signal systems. The candidate needs to have the background/experience on power electronics,... more |
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| Jul 21 | Senior PreSi Verification Engineer | Intel | Santa Clara, CA |
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development, ModelSim*, coverage analysis, VHDL and/or Verilog*, C++, and Perl scripting is also required. - Experience with System Verilog is a must - Experience with complex SoC... more |
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| Jul 21 | ASIC Designer | Research In Motion | Redwood City, CA |
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code development and system integration in VHDL (primary) and Verilog (secondary) * Algorithm implementation in RTL using C model, Matlab as input * Logic synthesis, power and... more |
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| Jul 21 | Engineer, Staff - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 21 | Silicon Applications Engineer (Temporary Position) | Xilinx | San Jose, CA |
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specifications. Develop solutions in VHDL or Verilog. Verify the reference ... RTL Design in Verilog or VHDL and board/lab experience... more |
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| Jul 21 | Software Development Engineer | Engineering | Santa Clara, CA |
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and functions. 2. Familiarity with VHDL or Verilog programming targeted for ASIC, FPGA or CPLD. 3. Good understanding of point to multipoint MAC protocols, WiMAX, LTE and/or WiFi. more |
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| Jul 20 | Circuit Design Engineer | IBM | San Mateo, CA |
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n Engineering * At least 5 years experience in Developing Digital Circuits for Arrays * Basic knowledge in Semiconductor Manufacturing Additional information A knowledge of VHDL... more |
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| Jul 20 | Circuit Design Engineer | IBM | Sunnyvale, CA |
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n Engineering * At least 5 years experience in Developing Digital Circuits for Arrays * Basic knowledge in Semiconductor Manufacturing Additional information A knowledge of VHDL... more |
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| Jul 20 | Circuit Design Engineer | IBM | San Jose, CA |
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n Engineering * At least 5 years experience in Developing Digital Circuits for Arrays * Basic knowledge in Semiconductor Manufacturing Additional information A knowledge of VHDL... more |
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| Jul 20 | Circuit Design Engineer | IBM | Mountain View, CA |
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n Engineering * At least 5 years experience in Developing Digital Circuits for Arrays * Basic knowledge in Semiconductor Manufacturing Additional information A knowledge of VHDL... more |
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| Jul 20 | Circuit Design Engineer | IBM | Menlo Park, CA |
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n Engineering * At least 5 years experience in Developing Digital Circuits for Arrays * Basic knowledge in Semiconductor Manufacturing Additional information A knowledge of VHDL... more |
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| Jul 20 | Circuit Design Engineer | IBM | Foster City, CA |
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n Engineering * At least 5 years experience in Developing Digital Circuits for Arrays * Basic knowledge in Semiconductor Manufacturing Additional information A knowledge of VHDL... more |
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| Jul 20 | Senior PreSi Verification Eng | Intel | Santa Clara, CA |
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development, ModelSim*, coverage analysis, VHDL and/or Verilog*, C , and Perl scripting is also required. - Experience with System Verilog is a must - Experience with complex SoC... more |
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| Jul 20 | Senior EDA Software Engineer- Verification | CAE Recruiters | San Jose, CA |
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in EDA software design with C, C++, VHDL and Verilog ? Experienced with formal verification, simulation, and synthesis protocols ? Knowledge in formal verification techniques,... more |
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| Jul 19 | Engineer, Sr Staff - IC Design | Sunnyvale, CA | |
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and/or experience in logic design, timing analysis, creation of test cases, code coverage, and fault coverage. Proficiency in VHDL/Verilog, and experience in C/C++, PERL., and... more |
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| Jul 19 | Applications Engineer, Senior | Altera | San Jose, CA |
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SATA, Interlaken Experience in Verilog or VHDL coding, chip-level verification, and hardware lab bring up Practical experience with high speed test equipment for eye diagram,... more |
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| Jul 18 | Staff Software Engineer (QA/TE) | Lattice Semiconductor | San Jose, CA |
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in developing system level designs in VHDL, Verilog, along with subsequent test ... languages Skills and Responsibilities: VHDL Skills and Responsibilities: Utilize... more |
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| Jul 16 | Lead Camera Design Engineer | Jai In | San Jose, CA |
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Strong knowledge of VHDL/Verilog, C/C++ programming Strong working knowledge of digital circuit design and firmware development / debug Strong experience with low noise, high... more |
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| Jul 16 | Senior EDA Software Engineer- Verification | CAE Recruiters | San Jose, CA |
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in EDA software design with C, C++, VHDL and Verilog ? Experienced with formal verification, simulation, and synthesis protocols ? Knowledge in formal verification techniques,... more |
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| Jul 16 | EDA Verification Tools FAE | CAE Recruiters | San Jose, CA |
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interaction. ? Expert in Verilog and VHDL, formal verification technology, overall verification flow. ? Solid knowledge of office tools and UNIX operating system. ? Excellent... more |
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| Jul 15 | Engineer, Staff - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy ... Engineering, Hardware, LAN, Matlab, Programming, RF, Systems, Test, VHDL,... more |
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| Jul 15 | ASIC DESIGN ENG | Arrow Electronics | Santa Clara, CA |
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Analysis - Strong knowledge of Verilog/VHDL coding/design required - Ability to multiplex many issues, set priorities, leads, and works in a strong team environment - Customer... more |
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| Jul 14 | ASIC Design & verification Engineers | Edc Europe | San Jose, CA |
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Design & Verification with experience in VHDL, Verilog, RTL, Verification, NCSIM, ... to be on. ASIC Design, Verification, VHDL, Verilog, RTL, Verification, NCSIM,... more |
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| Jul 14 | Research Scientist | Intel | Santa Clara, CA |
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VHSIC Hardware Description Language (VHDL) and/or Verilog* Register Transfer Level (RTL) development with familiarity to standard Computer Aided Design (CAD) flow for synthesis... more |
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| Jul 14 | Engineer | Marvell Semiconductor | Santa Clara, CA |
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exp or graduate-level coursework): Verilog, VHDL, integrated circuit design, computer architecture, random processes, information theory, signal processing, NC Verilog, NCSim,... more |
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| Jul 14 | Software Development Engineer | Aviat Networks | Santa Clara, CA |
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and functions. 2. Familiarity with VHDL or Verilog programming targeted for ASIC, FPGA or CPLD. 3. Good understanding of point to multipoint MAC protocols, WiMAX, LTE and/or WiFi. more |
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| Jul 13 | Sr Member Consulting Staff , Formal Verification | Cadence Design Systems | San Jose, CA |
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In depth knowledge of Verilog and/or VHDL 4. Experience in writing parser/compiler is a plus 5. Abilities to handle multiple projects to completion 6. Experience with relevant... more |
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| Jul 12 | HW Design SR ENG I | STMicroelectronics | Santa Clara, CA |
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Fluent in VHDL/Verilog/Sytem Verilog. Understand Tcl and Perl. Experenced with IC ... design Design/Verification Digital Chip: VHDL Design/Verification Digital Chip:... more |
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| Jul 12 | SR. DFT ENGINEER | Sandforce | Saratoga, CA |
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RTL coding Design/Verification Analog Chip: VHDL Design/Verification Analog Chip: Create test bench Design/Verification Analog Chip: C/C++ Design/Verification Analog Chip: Perl... more |
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| Jul 11 | Manager, Software Engineering | Altera | San Jose, CA |
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Your team will work closely with Verilog & VHDL designers and with the FPGA architecture designers for these hardware features, so experience with FPGA hardware or digital logic... more |
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| Jul 11 | VWSVO4162: FPGA Engineer 1 | Applied Signal Technology | Sunnyvale, CA |
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FPGA designs 2. Implement FPGA designs in VHDL and simulate their performance 3. ... Familiarity with FPGA design tools, development environments and languages (VHDL and/or... more |
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| Jul 10 | Engineer , Staff I - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 10 | Sr Staff Software Engineer - Place & Route | Tabula | Santa Clara, CA |
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Preferred Skills: Knowledge of Verilog/VHDL. Knowledge of scripting languages such as ... algorithms synthesis placement routing C++ eda cad verilog vhdl scripting perl tcl... more |
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| Jul 09 | Engineer I - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 08 | Hardware Engineer | Intel | Santa Clara, CA |
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the following areas: VLSI, System Verilog*, VHDL, RTL, Specman*, Gate-level design, Transistor-level design, IA-32 architecture,Power Management (ACPI) knowledge or Object... more |
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| Jul 08 | Staff SQA Engineer | Tabula | Santa Clara, CA |
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analysis and results reporting, and Verilog/VHDL coding. This is a great opportunity to ... and timing closureExperience with Verilog/VHDL languages and constructs and HDL design... more |
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| Jul 07 | Applications Engineer Sr | Lattice Semiconductor | San Jose, CA |
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in one or more programming languages. VHDL and Verilog experiences. Hands on experience with FPGA projects that have place and route and timing closure chanlenges.-Understanding... more |
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| Jul 07 | Sr Software Engineer (QA/TE) | Lattice Semiconductor | San Jose, CA |
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in developing system level designs in VHDL, Verilog along with subsequent test ... verbal communication skills * Proficient in VHDL.Verilog and Syatem Verilog * Experience... more |
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| Jul 06 | SW Engr, Verification | Cadence Design Systems | San Jose, CA |
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tool chains and/or languages (e.g. Verilog, VHDL). Experience in EDA tools, especially verification products/tools - simulation, acceleration, emulation- and customer use models. more |
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| Jul 06 | Member of Consulting Staff | Cadence Design Systems | San Jose, CA |
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tool chains and/or languages (e.g. Verilog, VHDL). Company Information Cadence enables global electronic-design innovation and plays an essential role in the creation of today's... more |
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| Jul 06 | Board/Systems Engineer | Cross Creek Systems | San Jose, CA |
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egulators and power supplies. 4. Experience with FPGAs. 5. Excellent written and oral communication skills. Desired Experience: 1. Familiarity with RF board design. 2. more |
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| Jul 06 | Lead Engineer-Hardware | General Dynamics | Santa Clara, CA |
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architectures, firmware development (VHDL, C and/or assembly language), schematic capture, and analysis/simulation tools such as Synplicity, ModelSim, Xilinx ISE, Matlab, and... more |
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| Jul 06 | Engineer, Sr. Staff - IC Design | Broadcom | Sunnyvale, CA |
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of designs Highly skilled in Verilog/VHDL RTL design/simulation/verification Knowledge of ASIC design methodology, and experience with logic synthesis Knowledge of C/C++, Perl,... more |
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| Jul 06 | Engineer, Sr Staff - Systems Design | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 05 | Principal Electronics Engineer | Cymer | Santa Clara, CA |
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circuits; high speed embedded computing, VHDL Logic Design, distributed signal ... Design experience with cPCI, PC104, FPGA, VHDL, embedded control, CPLD and CAN bus... more |
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| Jul 05 | Staff FPGA Design Engineer | Intersil | Santa Clara, CA |
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• Implementations using Verilog and/or VHDL • System integration with board-level designs • System-level Analysis and Architectural design • Work with other engineers on a team to... more |
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| Jul 03 | Manager, Software Engineering | Altera | San Jose, CA |
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Your team will work closely with Verilog & VHDL designers and with the FPGA architecture designers for these hardware features, so experience with FPGA hardware or digital logic... more |
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| Jul 03 | Principal Hardware Design Engineer (FPGA) | Kforce Technology Staffing | San Jose, CA |
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Expertise in either Verilog (preferred) or VHDL development languages * Expertise in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx ISE... more |
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| Jul 02 | Lead Engineer-Hardware | General Dynamics | Santa Clara, CA |
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architectures, firmware development (VHDL, C and/or assembly language), schematic capture, and analysis/simulation tools such as Synplicity, ModelSim, Xilinx ISE, Matlab, and... more |
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| Jul 02 | Manager, Software Engineering | Altera | San Jose, CA |
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Your team will work closely with Verilog & VHDL designers and with the FPGA architecture designers for these hardware features, so experience with FPGA hardware or digital logic... more |
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| Jul 02 | Intern | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 02 | Lead Engineer-Hardware | General Dynamics Advanced Information System | Santa Clara, CA |
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architectures, firmware development (VHDL, C and/or assembly language), schematic capture, and analysis/simulation tools such as Synplicity, ModelSim, Xilinx ISE, Matlab, and... more |
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| Jul 02 | RFIC, Analog IC, ASIC Design Engineers | Terran Systems | Santa Clara, CA |
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ar, Mobile Industry Background MAC/ PHY Layer Experience GPS, GSM Design/Knowledge PLL, SERDES, High-Speed, CDR Design Experience Verilog/VHDL RFIC, LNA, VCO, Cadence, Spectre... more |
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| Jul 01 | Intern | Broadcom | San Jose, CA |
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skills Knowledge of Verilog or VHDL design languages is a must Experience in digital logic design and verification is a must FPGA synthesis experience is a plus, some synthesis... more |
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| Jul 01 | Intern | Broadcom | San Jose, CA |
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skills . Knowledge of Verilog or VHDL design languages is a must . Experience in digital logic design and verification is a must . FPGA synthesis experience is a plus, some... more |
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| Jul 01 | Engineer, Senior Staff System | Marvell Technology Group | Santa Clara, CA |
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understanding of hardware design principles and some HDL (VHDL/Verilog) literacy b. Familiar with the physical layer of at least one modern wireless communication system, such as... more |
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| Jul 01 | Intern | Broadcom | Sunnyvale, CA |
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* Understanding of hardware design principles and some HDL (VHDL/Verilog) literacy. * DSP experience is desirable. * RF experience is desirable. * Must have excellent written and... more |
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| Jul 01 | Staff Verification Engineer | Actel | Mountain View, CA |
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HDL languages System Verilog, Verilog and VHDL Good knowledge of UNIX shell scripting , Perl and TCL scripting Good knowledge and understanding of CMOS device operation and... more |
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| Jul 01 | Sr. FPGA/ASIC Design Engineer | Zandermax Technologies | Sunnyvale, CA |
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for FPGA/ASIC systems using Verilog/VHDL Extensive experience coding Verilog/VHDL of signal processing blocks Experience with RTL verification, modeling, & simulation Excellent... more |
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| Jun 30 | Lead CAD Engineer | Intersil | Milpitas, CA |
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and Digital design, and software design; Knowledge of logical and physical synthesis, timing closure, and circuit simulation; Languages: Perl, Tcl, Verilog, VHDL. more |
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| Jun 29 | Applications Eng Manager / 50226357 | Mentor Graphics | San Jose, CA |
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- Chip/ASIC design or verification experience - knowledge of SystemVerilog/Verilog/VHDL language, RTL, behavioral coding and general ASIC debug. - Must have previous experience... more |
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| Jun 29 | Your New Job for 2010 - June Openings | N2tech.com | San Jose, CA |
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Applications Engineer - EDA, FPGA, Verilog, VHDL Applications Support Engineer Cellular Applications Engineer Field Application Engineer Filed Applications Engineer Firmware... more |
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| Jun 28 | Electrical Engineer III | Varian Medical Systems | Palo Alto, CA |
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SW (eg: SPICE). Experience writing VHDL or Verilog to program FPGA's.Typical ... Verilog Design/Verification Digital Chip: VHDL Design/Verification Digital Chip:... more |
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| Jun 28 | Applications Engineer, Senior | Altera | San Jose, CA |
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SATA, Interlaken Experience in Verilog or VHDL coding, chip-level verification, and hardware lab bring up Practical experience with high speed test equipment for eye diagram,... more |
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