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Oct 08 Electronic System-Level (ESL) Modeler (SystemC, SoC) HCL America Hillsboro, OR

(as many) Hardware modelling using (SystemC, C++, DML, TLM Standards, HDL) OSCI, ... and verifiable professional experience. systemc c c++ esl tlm microprocessor... more

More Job Postings from the Web
Oct 23 Emulation/FV Applications Engineer - 2952 Mentor Graphics Austin, TX

general ASIC debug. C programming desirable. SystemC and C++ used in conjunction with chip design and verification highly desired. Must have previous experience with industry... more

Oct 22 Emulation/FV Applications Engineer Mentor Graphics Austin, TX

desirable. SystemC and C++ used in conjunction with chip design and verification highly desired. • Must have previous experience with industry emulation solutions, as well as... more

Oct 22 RTL Validation engineer Intel California

in object-oriented programming such as SystemC and SystemVerilog, assertion languages such as OVA, as well as verification coverage tools and matrices are required. Knowledge of... more

Oct 22 Staff RTL Validation Engineer (DCG) Hillsboro, OR

in object-oriented programming such as SystemC and SystemVerilog, assertion languages such as OVA, as well as verification coverage tools and matrices are required. Familiarity... more

Oct 21 Staff RTL Validation Engineer (DCG) Intel Hillsboro, OR

in object-oriented programming such as SystemC and SystemVerilog, assertion languages such as OVA, as well as verification coverage tools and matrices are required. Familiarity... more

Oct 21 ASIC Verification Engineer Marvell Santa Clara, CA

Verilog, VCS/NCsim, Modeltech, C-language or SystemC, Vera, Specman, System Verilog. Candidate must show a strong knowledge in the development of chip verification environments... more

Oct 21 Design Verification and Methodology Deployment Engineer Encore Semi San Diego, CA

languages: C, C++, and SystemC. • Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired. • Scripting and... more

Oct 21 ASIC Verification Engineer Results Center Santa Clara, CA

Verilog, VCS/NCsim, Modeltech, C-language or SystemC, Vera, Specman, System Verilog. Candidate must show a strong knowledge in the development of chip verification environments... more

Oct 20 Intern, Systems IP Middlesex Community College Austin, TX

models (TLMs) in a SystemC-based framework Specification and creation of test harnesses and methodologies using interpreted languages like Python and Perl Verification • Formal... more

Oct 20 Intern, Systems IP Artisan Austin, TX

models (TLMs) in a SystemC-based framework Specification and creation of test harnesses and methodologies using interpreted languages like Python and Perl Verification • Formal... more

Oct 20 Embedded Systems Engineer, Senior Altera San Jose, CA

virtual platforms, and emulators, e.g. QEMU, SystemC, etc. Familiarity with software engineering tools, such as UML, requirements management, test frameworks. Scripting skills,... more

Oct 19 Computer Architect / Computer Engineer Job Leidos San Diego, CA

4+ years of experience with Verilog, VHDL, SystemC, and/or SystemVerilog for the ... •Platform exploration (SystemC/TLM) for custom SoC using industry standard tools... more

Oct 19 Senior Computer Architect / Computer Engineer Job Leidos San Diego, CA

8+ years of experience with Verilog, VHDL, SystemC, and/or SystemVerilog for the ... •Platform exploration (SystemC/TLM) for custom SoC using industry standard tools... more

Oct 19 Embedded HW/SW Design Engineer Job Leidos San Diego, CA

6+ years experience with Verilog, VHDL, SystemC, SystemVerilog, and/or Matlab for the deve ... •Platform exploration (SystemC/TLM) for custom SoC using industry standard tools... more

Oct 19 Video C-Model Engineer Apple Santa Clara, TX

of c-modeling tools, including C/C++, SystemC and scripting languages such as Perl and/or Python * Knowledge of video coding standards including MPEG-4, H.264, HEVC * Knowledge of... more

Oct 17 Embedded Systems Engineer.. UTC Aerospace Systems Windsor Locks, CT

and analysis using languages such as SystemC or UML, software requirements modeling and simulation-based verification, HIL and SIL verification testing, network performance... more

Oct 17 Engineer Circuit Design 3 with Security Clearance Northrop Grumman El Segundo, CA

and modeling using C/C++, SystemVerilog, or SystemC. Northrop Grumman Corporation is a leading global security company providing innovative systems, products, and solutions in... more

Oct 16 Hardware Engineer Collabera San Diego, CA

with programming languages: C, C++, and SystemC. -Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired. more

Oct 15 Intern, Design Engineer Middlesex Community College Austin, TX

models (TLMs) in a SystemC-based framework Specification and creation of test harnesses and methodologies using interpreted languages like Python and Perl Verification • Formal... more

Oct 15 Intern, Design Engineer Artisan Austin, TX

models (TLMs) in a SystemC-based framework Specification and creation of test harnesses and methodologies using interpreted languages like Python and Perl Verification • Formal... more

Oct 14 Digital Verification Engineer Cyient Raleigh, NC

+ of experience in OVM or UVM (or at least VMM), verification (systemverilog, ovm/uvm/vmm, random testbench), programming (oop, c/c++, systemc, perl), rtl design (verilog or... more

Oct 13 Advanced Memory Systems RTL Lead Engineer Job Micron Boise, ID

Compiler, PrimeTime, IC Compiler, etc.), SystemC. Education: A BS in Electrical or Computer Engineering or similar and 5+ years of logic/system design experience including ASIC... more

Oct 13 Sr Memberand MTS Eda Careers California

abstract specifications written in C++/SystemC and their corresponding RTL implementations. In this role, you will be directly contributing to leading edge software development... more

Oct 11 Technical Director/Chip Architect Broadcom Irvine, CA

Auto req ID 30319BR Job Posting Title Technical Director/Chip Architect* Business ... is highly desirable Country US State/Province CA City/Town Irvine Shift 1st Shift - Day... more

Oct 11 Principal Electrical Engr with Security Clearance Raytheon Dallas, TX

methodology utilizing industry standardized SystemC, OpenCL and OVM/UVM . The individual ... Required Skills: 1.Expertise with RTL (VHDL/Verilog) languages 2.Expertise with SystemC wi... more

Oct 09 Sr. ASIC/FPGA Verification Engineer General Dynamics Arizona

Perl, and UNIX. * Proficiency with SystemC and a big plus. * Knowledge of OVM, UVM or VMM is required. * Knowledge of high-speed peripheral interfaces (PCI/SpaceWire, SERDES,... more

Oct 08 Pre- Silicon Verification-(252689) Compnova Santa Clara, CA

• Expertise in c/c++ and systemC. Knowledge of Specman/e a plus. • Knowledge of emulation and writing testbenches for emulation a plus. Excellent communication and team work... more

Oct 08 Modeling/ Virtual Platform Engineer Sage IT Portland, OR

5+ years of Experience in C/ C++/ SystemC based modeling design, validation ... test bench, test environment, development of SystemC test cases as well system regression... more

Oct 08 Computer Algorithms Automatic Speech recognition Intouch Staffing Professionals Sunnyvale, CA

scripting experience middot Knowledge of SystemC US Citizens and all other parties authorized to work in the US are encouraged to apply. We are unable to sponsor H1B Visarsquos at... more

Oct 08 Logic Design Student for Computer Vision Group Intel Israel, PR

using state of the art techniques like SystemC (HLS).BSc/MSc in Electronic Engineer studies C++ knowledge and logic design knowledge is an advantage Minimum 20 hours a week with... more

Oct 08 Verification Architect Compnova Hudson, MA

Expertise in C/C++ and systemC. Knowledge of Specman/e a plus. Knowledge of emulation and writing testbenches for emulation a plus. Excellent communication and team work skills. more

Oct 08 System Modelling Enterprise Solutions Mountain View, CA

and validating cycle-accurate IP models in SystemC/TLM Integrate IP models in SOC ... Skills: Good knowledge and experience in SystemC/TLM2 Expert in C++ and OOPs Knowledge... more

Oct 08 Need Modeling/ Virtual Platform Engineer @ Simplion Technologies Portland, OR

2. 5+ years of Experience in C/ C++/ SystemC based modeling design, validation ... bench, test environment, development of SystemC test cases as well system regression... more

Oct 08 CAD R&D HW Engineer with SW Orientation – Haifa Intel Israel, PR

mainly on modeling HW systems: - Building SystemC models for HW components - ... programming skills in C/C++ Advantage: modeling background knowledge and SystemC... more

Oct 08 Software Engineer for Emulation/Simulation Team Intel Israel, PR

The position involves modeling of virtual platforms solutions and models in SystemC / DML ... in an international environment Advantage: SystemC - significant advantage Virtual... more

Oct 08 HLS HW Engineer Intel Israel, PR

analysis, and quality assurance. * C++ and systemC coding skills; * Strong hardware architecture, VLSI design, and verification skills. * Good understanding and experience with... more

Oct 08 SW Virtual Platform Engineer Intel Israel, PR

The position involves modeling of virtual platforms solutions and models in SystemC / DML ... Advantage: DML - significant advantage SystemC - significant advantage Virtual... more

Oct 08 Embedded System Engineer Net2source Portland, OR

and validating cycle-accurate IP models in SystemC/TLM Integrate IP models in SOC ... Skills: Good knowledge and experience in SystemC/TLM2 Expert in C++ and OOPs Knowledge... more

Oct 08 Instant Closure Need Pre-Silicon Engineer @ Simplion Technologies Milpitas, CA

PCIe, USB, SATA, MIPI etc ) or Memory Interfaces ( Flash, DDR, SDIO etc ) or SoC infrastructure blocks ( Bus Infrastructure, DMA etc ). Experience in emulation / systemc is a... more

Oct 08 Networking Architecture - Student position Intel Israel, PR

subsystem. The student will develop a SystemC modeling environment to accurately ... and the ability to be a self-starter. SystemC programming background -... more

Oct 08 Audio Performance Simulation Architect Intel California

an Object Oriented Perspective Knowledge of SystemC, TLM, and modeling in general Enthusiasm to prototype and discard code as necessary Scripting An enjoyment of tinkering,... more

Oct 08 ASIC Design Engineer Tektronix Beaverton, OR

OVM) * Experience modeling HW using C++/SystemC and HW/SW co-simulation techniques * Demonstrated analytic and problem solving skills * Ability to work in large multi-site teams *... more

Oct 08 System Modelling Architect Enterprise Solutions Portland, OR

and validating cycle-accurate IP models in SystemC/TLM Integrate IP models in SOC ... stacks on the VP Skills: Embedded SW, C++, SystemC/ TLM2/ Perl/ Python/ Basic... more

Oct 08 Speech Recognition - Computer Algorithms Automatic Speech Engineer Intouch Staffing Professionals Santa Clara, CA

or Python scripting experience Knowledge of SystemC US Citizens and all other parties authorized to work in the US are encouraged to apply. We are unable to sponsor H1B Visarsquos... more

Oct 08 ASIC Design Engineer Videojet Technologies Beaverton, OR

OVM) * Experience modeling HW using C++/SystemC and HW/SW co-simulation techniques * Demonstrated analytic and problem solving skills * Ability to work in large multi-site teams *... more

Oct 08 ASIC Design Engineer Arbor - Danaher Beaverton, OR

OVM) Experience modeling HW using C++/SystemC and HW/SW co-simulation techniques Demonstrated analytic and problem solving skills Ability to work in large multi-site teams Strong... more

Oct 07 Verification Engineer - ASIC Fusion408 Raleigh, NC

hardware design and debug * Experience with SystemC and other programming languages are a plus. * Experience working with OVM or Specman e is a plus * Experience working with... more

Oct 07 Intern - Network IC Design (Summer 2015) Broadcom San Jose, CA

2. Experience with a simulation tool such as SystemC/NS-2 **Country** US **State/Province** CA **City/Town** San Jose **Shift** 1st Shift - Day **Percent of Travel Required** None... more

Oct 06 Principal EDA Software Engineer- Formal Verification CAE Recruiters San Jose, CA

abstract specifications written in C++/SystemC and their corresponding RTL implementations and contributing to leading edge software development for this tool. This will involve... more

Oct 06 Staff Software Development Engineer - Modeling/Simulator Design Fusion408 Santa Clara, CA

* Create software model/simulator (in C++/C/SystemC) of ICs that we develop to enable ... Oriented programming abilities in C++ or SystemC. * Solid history with knowledge of IC... more

Oct 04 Sr. Staff Verification Engineer Broadcom San Jose, CA

languages (Verilog/SystemVerilog/SystemC/VHDL), high level languages (C++), ... in languages such as Systemverilog, SystemC, C/C++, Perl, TCL/TK. * Strong... more

Oct 04 Intern, Design Engineer ARM Austin, TX

using transaction-level models (TLMs) in a SystemC-based framework Specification and creation of test harnesses and methodologies using interpreted languages like Python and Perl... more

Oct 03 Engineer - Drive Architecture Hardware Systems - Entry Level Seagate Minnesota

modeling tools like Hyperformix Workbench, SystemC, and iSight. Internship in a related industry. Familiarity with Six Sigma, Design for Six Sigma, and Design for Reliability. HR... more

Oct 03 Embedded Systems Engineering Lead United Technologies Windsor Locks, CT

and analysis using languages such as SystemC or UML, software requirements modeling and simulation-based verification, HIL and SIL verification testing, network performance... more

Oct 02 Embedded Systems Engineering Lead UTC Aerospace Systems Connecticut

and analysis using languages such as SystemC or UML, software requirements modeling and simulation-based verification, HIL and SIL verification testing, network performance... more

Oct 01 Principal Communications Systems Engineer Kelly Services Irvine, CA

algorithms Matlab and C / C++ expertise, SystemC expertise a plus Expertise on complexity aware, efficient, low power system design techniques is a strong plus Strong analytical... more

Sep 28 Staff R&D Simulation Tools Engineer Synopsys Sunnyvale, CA

new features for the transaction level SystemC models as well as cycle accurate ... SystemC 2.x, OSCI SystemC, TLM 2.0 API standards a plus · Expert-level programming... more

Sep 17 Principal R&D Application Engineer San Jose, CA

programming and system simulation using SystemC is a plus Must have excellent written and verbal communication skills as well as good problem solving skills. Able to travel 2 to... more

Sep 16 Patient Care Assistant St. Luke's University Health Network Coaldale, PA

orders using order entry computer systemc) Maintains sufficient unit suppliesd) Maintains unit statistics, manuals and logs as assignede) Communicates between members of the... more

Sep 13 CPU Model Engineer ARM Austin, TX

microarchitecture * Prior knowledge of SystemC / TLM2 would be an advantage It is essential for the successful applicant to: * Demonstrate enthusiasm, drive and diligence * Work... more

Sep 12 FPGA/ASIC Engineer General Dynamics Arizona

C/C++, Perl, and UNIX. Proficiency with SystemC and a big plus. Knowledge of OVM, UVM or VMM is required. Knowledge of high-speed peripheral interfaces (PCI/SpaceWire, SERDES,... more

Sep 12 Sr Verification Engineer Job SanDisk Milpitas, CA

include: Developing behavioral models in SystemC and C++ and methodology development for logic verification. RTL and Gate level simulation/verification. Support of assertions and... more

Sep 11 CPU Model Engineer Middlesex Community College Austin, TX

microarchitecture * Prior knowledge of SystemC / TLM2 would be an advantage It is essential for the successful applicant to: * Demonstrate enthusiasm, drive and diligence * Work... more

Sep 11 Intern: ASIC Engineer Juniper Networks Sunnyvale, CA

or Computer Science * Strong Verilog, SystemC or C/C++, Perl/shell skills. * Must have good leadership and communication skills. * Networking experience is highly desirable, but... more

Sep 11 Analog EDA Application Engineer Texas Instruments Dallas, TX

MATLAB, Verilog, Verilog-A,, Verilog-AMS, VHDL, VHDL-AMS and/or SystemC). * Ability to setup and debug analog and mixed-signal simulations and analyze data in Analog Artist is... more

Sep 11 CPU Model Engineer Artisan Austin, TX

microarchitecture * Prior knowledge of SystemC / TLM2 would be an advantage It is essential for the successful applicant to: * Demonstrate enthusiasm, drive and diligence * Work... more

Sep 08 Intern- Firmware/Microcode Job Micron Boise, ID

- Contributing to the architecture of SystemC models of the Advanced Memory Systems ... software development tools, debuggers, SystemC, and simulation techniques is a plus. more

Sep 08 Intern- SoC Performance Modeling Job Micron Boise, ID

models. Model development will be in SystemC and SystemVerilog. Canidate should be ... - C/C++, SystemC, or SystemVerilog, and Python experience is desired... more

Sep 07 Sr Staff Design Verification Engineer Broadcom San Jose, CA

languages (Verilog/SystemVerilog/SystemC/VHDL), high level languages (C++), ... in languages such as Systemverilog, SystemC, C/C++, Perl, TCL/TK. * Strong... more

Sep 05 Intern – ASIC HW Engineer InterDigital King of Prussia, PA

methodology including RTL (VHDL, Verilog, SystemC), simulation, synthesis, etc. Job ... including RTL (VHDL, Verilog, SystemC), simulation, synthesis, etc. · Pragmatic... more

Sep 02 Graduate Design Engineer - Systems IP Artisan Austin, TX

models (TLMs) in a SystemC-based framework •Specification and creation of test harnesses and methodologies using interpreted languages like Python and Perl Verification • Formal... more

Sep 02 Graduate Design Engineer - Systems IP Middlesex Community College Austin, TX

models (TLMs) in a SystemC-based framework •Specification and creation of test harnesses and methodologies using interpreted languages like Python and Perl Verification • Formal... more

Aug 31 Product Engineering SW Architect - Semi and System Software Wipro Technologies Portland, OR

Embedded SW, C++, SystemC/ TLM2/ Perl/ Python/ Basic Architecture concepts, SW processes?Basic ISA modeling / IP Modeling / Writing Tests / AutomationSOC Modeling ( Func / Cycle... more

Aug 21 Multiple Openings with Qualcomm--- Immediate Interviews Calsoftlabs-an Alten Group Company San Diego, CA

and supporting C++ and SystemC functional models for the Digital Hardware Team in ... environment at SystemC level - HW/SW co-verification - HLS tools such as... more

Aug 15 RTL Validation engineer Job Intel Santa Clara, CA

in object-oriented programming such as SystemC and SystemVerilog, assertion languages such as OVA, as well as verification coverage tools and matrices are required. Knowledge of... more

Aug 09 Audio Performance Simulation Architect Job Intel Folsom, CA

an Object Oriented Perspective Knowledge of SystemC, TLM, and modeling in general Enthusiasm to prototype and discard code as necessary Scripting An enjoyment of tinkering,... more

Aug 05 Design Modeling Engineer-Temporary - Engineer III Mindlance San Diego, CA

advanced modeling methodologies in C++ and SystemC. You are expected to understand the ... for implementing and supporting C++ and SystemC functional models for the Digital... more

Aug 04 Design Modeling Engineer Calsoftlabs-an Alten Group Company San Diego, CA

for implementing and supporting C++ and SystemC functional modelsfor the Digital ... -Design and verification environment at SystemC level -HW/SW co-verification -HLS... more

Aug 04 Engineer Circuit Design 3(14015703) Northrop Grumman Manhattan Beach, CA

and modeling using C/C++, SystemVerilog, or SystemC. Northrop Grumman Corporation is a leading global security company providing innovative systems, products, and solutions in... more

Aug 02 Principal Application Engineer Cadence Design Systems Austin, TX

environments utilizing SystemVerilog, e or SystemC/C++ . Looking for System Verilog and UVM skills. Experience creating a Verification Plan and using verication management tools... more

Jul 24 ASIC Design Verification Viasat Marlborough, MA

experience * Experience with C++ or SystemC Our Marlborough office is an extension of our Carlsbad, California Engineering Center. The office provides a start-up feel with the... more

Jul 14 SMTS ASIC/ Layout Design Engineer Amd | Seamicro Sunnyvale, CA

well as CUDA/OpenCL experience is a plus o SystemC based modeling experience could be useful as well • Expert level in C/C++ programming and Linux • Unix environment experience... more

Jul 09 Verification engineer Intel Israel, PR

ign and verification - Track record of practical problem solving, excellent communication, and documentation skills - Verilog, C Desired: - SystemC, SystemVerilog - Matlab -... more

Jul 08 Design Verification Engineer Amd | Seamicro Sunnyvale, CA

functional modeling using C++ and SystemC preferred • Familiarity with System Verilog and OVM/UVM preferred • Experience with build tools including make, version control, Perl, or... more

Jul 01 Pre-Si IP Validation Hillsboro, OR

models for hardware components in C/C++, SystemC or equivalent languages * Experience in delivering IPs or integrating IPs working with internal and external customers *Job... more

Jun 29 Software Development Engineer Hillsboro, OR

Skills: working/hands on knowledge of SystemC/ C++/ C hands on experience with Virtual Prototyping and System Level Design Flows Additional knowledge: knowledge of developing for... more

Jun 21 Sr Application Engineer Cadence Design Systems San Jose, CA

with a mix of SystemVerilog, SystemC/C/C++, Verilog & VHDL using industry ... SystemVerilog, VHDL, Verilog, C/C++, SystemC * Experience with debug of UVM * Ability to... more

Jun 18 Mixed Signal Validation Hillsboro, OR

and validation * Working knowledge of C/C++/SystemC and other high level languages *Job Category:* Engineering *Primary Location:* USA-Oregon, Hillsboro *Full/Part Time:* Full... more

Jun 13 Team Lead Verification Engineer Teradyne North Reading, MA

and ATE support. - Expert level C/C++, SystemC, System Verilog programming skills are required - Extensive experience with verification EDA tools with ability to optimize... more

Jun 12 Principal R&D Application Engineer Cadence Design Systems San Jose, CA

programming and system simulation using SystemC is a plus * Must have excellent written and verbal communication skills as well as good problem solving skills. * Able to travel 2... more

Jun 09 Senior Principal Analog Design Engineer Terran Systems San Jose, CA

with analog behavioral modeling a plus (SystemC, System Verilog, Matlab) ? Self driven, results -oriented individual capabile of working well with a very experienced and proven... more

May 29 ASSOCIATE ASIC/FPGA Verification Engineer L-3 Communications Camden, NJ

in C/C , VHDL. * Proficiency with SystemC, System Verilog a big plus. * Knowledge of UVM desired but not required. Knowledge of high-speed peripheral interfaces (PCI-E/USB/SDIO,... more

Apr 23 Lead Engineer Mentor Graphics Incorporation Indiana

sure to ARM assembly language, ARM processor architecture, ARM Fast Models, QEMU are a plus. Exposure to Verilog/VHDL/System Verilog, SystemC and functional verification tools... more

Apr 18 Design Verification Engineer AMD Sunnyvale, CA

functional modeling using C++ and SystemC preferred • Familiarity with System Verilog and OVM/UVM preferred • Experience with build tools including make, version control, LSF,... more

Mar 10 Senior Application Engineer FV Mentor Graphics Incorporation Indiana

‘e’, Vera, PSL, SystemC knowledge • Simulation/Verification using directed tests, constraint random testing, assertions and coverage driven verification methods • RTL and Gate... more

Mar 10 Sr. Engineer, ASIC Design/Verification Sustainable Recruitment Concepts San Jose, CA

ec standards such as H.264, MPEG-2 or VP8 Knowledge of new H.265/HEVC standard a big plus Language: Verilog/VHDL, SystemVerilog, C/C++/SystemC, Scripting language Tools:... more

Jan 07 Sr. Verification Designer Cross Creek Systems Santa Clara, CA

flow Experience with tools - VERA, SystemC, TestBuilder, version control system and bug tracking system EDUCATION: Minimum of Master of Science degree Prefer Electrical... more

Jan 07 Field Applications Engineer Cross Creek Systems Palo Alto, CA

a plus Knowledge of RTL (Verilog/VHDL/SystemC) or Digital Signal Processors a plus   DETAILED JOB DESCRIPTION:   Work closely with sales on developing new prospects by analyzing... more

Oct 22 Design Verification Engineer Verilab Hillsboro, OR

experience using SystemVerilog, Specman/e, SystemC or Vera Project-based experience using UVM, OVM, AVM, VMM, and/or eRM BS/MS/PhD in Engineering or Computer Science Eligibility... more

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