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Mar 10 Member of Consulting Staff OOP SW Development for SystemC Simulation Cadence Design Systems San Jose, CA

with gcc is desirable. Experience with SystemC modeling and simulation is highly ... object-oriented programming in C++, SystemC simulation development and... more

Mar 10 Digital Verification Engineer Teranetics San Jose, CA

ASIC verification. * Verilog hdl, C, C++ * SystemC * Knowledge of SystemVerilog is plus * Prior experience in DSP verification is plus. * Basic knowledge of shell scripting *... more

Mar 10 QC Technician 1 Job BASF East Setauket, NY

related discipline. Knowledge of the Metric Systemc, GMPs and cGLPs requirements. Proficiency in use of a PC and standard operating systems. SAP experience preferred. BASF... more

Mar 10 ASIC / Digital Tranceiver Co-Op InterDigital King of Prussia, PA

methodology including RTL (VHDL, Verilog, SystemC), simulation, synthesis, etc. * Pragmatic knowledge of HW/SW partitioning and implementation of system level functions is... more

Mar 10 Senior ASIC Engineer - DSP - ASIC design - RTL - 802.11 - VLSI Cybercoders Minneapolis, MN

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - Primetime If ... technologies is a plus - Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 10 Staff Design Verification Engineer SiRF Technology San Jose, CA

verification using SystemVerilog, SystemC, Vera or Specman. * Strong expertise in writing test benches - BFM, monitors, scoreboard/checker, code coverage & functional coverage. *... more

Mar 10 Senior ASIC Engineer : DSP : ASIC design : RTL : 802.11 : VLSI Minneapolis, MN

802.11a : 802.11b : 802.11 : FPGA : ASIC : SystemC : SVTB : Formality : PrimetimeIf you ... technologies is a plus: Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 09 Member of Consulting Staff OOP SW Development for SystemC Simulation Cadence Design Systems San Jose, CA

of Consulting Staff OOP SW Development for SystemC Simulation Job ID #:3903 Location:San Jose, CA Functional Area:Engineering Cost Center:SysC Sim Analysis Position Type:Regular... more

Mar 09 Senior ASIC Engineer - DSP - ASIC design - RTL - 802.11 - VLSI Cybercoders Minneapolis, MN

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - PrimetimeIf you ... technologies is a plus- Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 09 Senior ASIC Engineer - DSP - ASIC design - RTL - 802.11 - VLSI Minneapolis, MN

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - PrimetimeIf you ... technologies is a plus- Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 09 Senior ASIC Engineer - DSP - ASIC design - RTL - 8 Cybercoders Minnesota

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - Primetime If ... technologies is a plus - Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 09 Senior ASIC Engineer - DSP - ASIC design - RTL - 802.11 - VLSI Cybercoders Minneapolis, MN

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - PrimetimeIf you ... technologies is a plus- Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 09 Senior ASIC Engineer - DSP - ASIC design - RTL - 802.11 - VLSI Cybercoders Minneapolis, MN

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - Primetime If ... technologies is a plus - Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 09 SOC Architect Maxlinear Carlsbad, CA

experience using modeling languages such as SystemC or an equivalent language to model processors, busses and custom IP, and have experience developing or guiding the embedded... more

Mar 09 Developer Mindlance Austin, TX

memory system design choices. Knowledge of pipelined multi-core architectures and memory systemsIndustry experience in modeling using C and systemC BSEE/CS, MSEE preferred, with... more

Mar 09 Sr Electrical Engineer Rockwell Collins Richardson, TX

and languages (e.g. functional coverage, SystemC, SystemVerilog) ASIC / FPGA lab validation with advanced lab equipment Design for Test (DFT) and manufacturability issues... more

Mar 09 Embedded Software Positions Technical Link Austin, TX

experience in modeling using C and systemC BSEE/CS, MSEE preferred, with 3+ years of relevant experience2. Job Description: 4858This person will be responsible for profiling and... more

Mar 08 Engineering Juniper Networks Sunnyvale, CA

Verilog. Write test benches for ASICs using SystemC, C++, & Verilog. Software Engineer #5448: Develop & maintain IP routing & MPLS signaling SW. Software Engineer #13157: Develop... more

Mar 08 Engineering Juniper Networks Sunnyvale, CA

Verilog. Write test benches for ASICs using SystemC, C++, & Verilog. Software Engineer #5448: Develop & maintain IP routing & MPLS signaling SW. Software Engineer #13157: Develop... more

Mar 08 Sr. ASIC Engineer Cybercoders Minneapolis, MN

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - Primetime If ... technologies is a plus - Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 08 Sr. ASIC Engineer Cybercoders Bloomington, MN

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - Primetime If ... technologies is a plus - Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 08 Principal Systems Engineer Broadcom Irvine, CA

Knowledge of C/C++ is required; SystemC is a plus. Matlab/Simulink experience is also useful. Knowledge of scripting languages like Perl or Python is highly desirable. Experience... more

Mar 08 ASIC Verification Engineer - Acceleration Broadcom Santa Clara, CA

ASIC verification Expertise with C++ (SystemC a plus) Expertise with Perl, Linux/UNIX Expertise with Verilog Expertise with major industry RTL simulator Experience with large SOC... more

Mar 08 Senior ASIC Engineer - DSP - ASIC design - RTL - 802.11 - VLSI Cybercoders Minneapolis, MN

802.11a - 802.11b - 802.11 - FPGA - ASIC - SystemC - SVTB - Formality - Primetime If ... technologies is a plus - Experience using SystemC, SVTB, Formality and Primetime is a... more

Mar 07 ESL Design & Verification Engineer, Sr. Staff Huawei Technologies Santa Clara, CA

C++/SystemC (TLM2.0) are the primary modeling languages, in both Linux and Windows ... issues and solutions Experts in C++/SystemC and TLM2.0, TCL/Python/scripting... more

Mar 07 ESL Design & Verification Engineer, Sr. Staff Huawei USA Santa Clara, CA

issues and solutions * Experts in C++/SystemC and TLM2.0, TCL/Python/scripting ... and use models from the SE/SW teams. C++/SystemC (TLM2.0) are the primary modeling... more

Mar 07 ASIC Verification Engineer - Acceleration Broadcom Santa Clara, CA

ASIC verification Expertise with C++ (SystemC a plus) Expertise with Perl, Linux/UNIX Expertise with Verilog Expertise with major industry RTL simulator Experience with large SOC... more

Mar 07 Hardware Developer 4 Oracle Austin, TX

coding skills in Verilog, System Verilog, SystemC or other relevant languages. In-depth understanding of formal methods, gate-level simulations, and code/functional coverage. This... more

Mar 06 ASIC Verification Engineer - Acceleration Broadcom Santa Clara, CA

ASIC verificationExpertise with C++ (SystemC a plus)Expertise with Perl, Linux/UNIX Expertise with Verilog Expertise with major industry RTL simulator Experience with large SOC... more

Mar 06 ASIC Verification Engineer - Acceleration Broadcom Santa Clara, CA

ASIC verification Expertise with C++ (SystemC a plus) Expertise with Perl, Linux/UNIX Expertise with Verilog Expertise with major industry RTL simulator Experience with large SOC... more

Mar 06 Principal Systems Engineer Broadcom Irvine, CA

Knowledge of C/C++ is required; SystemC is a plus. Matlab/Simulink experience is also useful. Knowledge of scripting languages like Perl or Python is highly desirable. Experience... more

Mar 06 Principal System Architect Broadcom San Jose, CA

simulation tools such as NS-2, Opnet, and SystemC.* Ability to shape product roadmap from a technical, standards, and technology point of view is required.* Strong knowledge of... more

Mar 06 Senior Architecture and System Design Engineer Broadcom San Diego, CA

level modeling experience desirable such as SystemC or other high level modeling tools- audio processing- security & DRMEducation:Master Degree in EE or Computer Science is... more

Mar 06 Verification Engineer Cybercoders Irvine, CA

- System Verilog - Storage - SSD - HDD - SystemC If you are a Verification Engineer ... in one of the following: Verilog, SystemC, E, or Vera - Bachelors required,... more

Mar 06 Verification Engineer Cybercoders Newport Beach, CA

- System Verilog - Storage - SSD - HDD - SystemC If you are a Verification Engineer ... in one of the following: Verilog, SystemC, E, or Vera - Bachelors required,... more

Mar 06 Verification Engineer - ASIC - RTL - SAS - SATA - Verilog - Vera Cybercoders Irvine, CA

- System Verilog - Storage - SSD - HDD - SystemC If you are a Verification Engineer ... in one of the following: Verilog, SystemC, E, or Vera - Bachelors required,... more

Mar 05 ASIC Verification Engineer - Acceleration Broadcom Santa Clara, CA

ASIC verificationExpertise with C++ (SystemC a plus)Expertise with Perl, Linux/UNIXExpertise with VerilogExpertise with major industry RTL simulatorExperience with large SOC... more

Mar 05 QC Technician 1 BASF East Setauket, NY

related discipline. Knowledge of the Metric Systemc GMPs and cGLPs requirements. Proficiency in use of a PC and standard operating systems. SAP experience preferred. BASF... more

Mar 05 Software Engineer, Staff Virage LOGIC Fremont, CA

f multicore SoC system operation. . Java and Eclipse development experience (design and implementation). . Experience with C++ and/or assembler . Exposure to SystemC and/or... more

Mar 05 Processor Architect-Performance Modeling Allegis Group Austin, TX

Required Skills:Modeling using C and systemC, Knowledge of pipelined mulit-core architectures & memory systems, BSEE or BSCS requiredPeople. Service. Performance. These values are... more

Mar 04 Principal Systems Engineer Broadcom Irvine, CA

experience.Knowledge of C/C++ is required; SystemC is a plus. Matlab/Simulink experience is also useful. Knowledge of scripting languages like Perl or Python is highly... more

Mar 04 Solutions Engineer Carbon Design Systems Boston, MA

knowledge of simulation languages (e.g., SystemC, Verilog, VHDL) Understanding of Transaction based verification systems Understanding of Specific Bus protocols (e.g., AMBA) and... more

Mar 03 Student/Intern IBM Yorktown Heights, NY

C++ programming. Preferred: experience with SystemC modeling and high-level syst. * English: Basic knowledge Preferred * Master's Degree in Other Sciences * At least 1 year... more

Mar 03 ESL Design & Verification Engineer, Sr. Staff Huawei Technologies Santa Clara, CA

C++/SystemC (TLM2.0) are the primary modeling languages, in both Linux and Windows ... issues and solutions Experts in C++/SystemC and TLM2.0, TCL/Python/scripting... more

Mar 03 ASIC Design Verification Engineer Broadcom Irvine, CA

proficiency in C, C++ language required- SystemC/SystemVerilog experience desired- Verilog design experience desired - Knowledge of System Verilog Functional Coverage and... more

Mar 03 Principal Systems Engineer Broadcom Irvine, CA

Knowledge of C/C++ is required; SystemC is a plus. Matlab/Simulink experience is also useful. Knowledge of scripting languages like Perl or Python is highly desirable. Experience... more

Mar 03 Ins Account Relationship Representative Huntington Bancshares Columbus, OH

Fax Advantage and the agency management systemc. Follow procedures as outlined in the Huntington Employee Handbookd. Identifies training needs to the department manager 3. Provide... more

Mar 03 Handheld Modeling Specialist Research In Motion North Carolina

ESL tools * Experience programming in C/C++/SystemC * Ability to quickly adapt to new situations and constraints * Ability to take initiative and responsibility in a team... more

Mar 02 Digital Verification Engineer Fusion408 San Jose, CA

understanding of C, hdl, Verilog, C++, & SystemC ? SystemVerilog knowledge is plus ? Previous experience working with DSP verification is another plus. ? Basic understanding of... more

Mar 02 Research Intern IBM Yorktown Heights, NY

C++ programming. Preferred: experience with SystemC modeling and high-level syst. * English: Basic knowledge Preferred * Master's Degree in Other Sciences * At least 1 year... more

Mar 02 Software Release Engineer Direct Supply Milwaukee, WI

Job Title: Software Release Engineer Profession: Computer Engineering and Information Technology -> Build Release Engineer Software Release EngineerRequisition ID 482Full/Part... more

Mar 02 Principal Systems Engineer Broadcom Irvine, CA

Knowledge of C/C++ is required; SystemC is a plus. Matlab/Simulink experience is also useful. Knowledge of scripting languages like Perl or Python is highly desirable. Experience... more

Mar 01 Research Intern IBM Yorktown Heights, NY

C++ programming. Preferred: experience with SystemC modeling and high-level syst. * English: Basic knowledge * Master's Degree in Other Sciences * At least 1 year experience in... more

Mar 01 System Architect Spansion Sunnyvale, CA

years experience expert knowledge C/C++ or SystemC expert experience with SOC design - HW: working knowledge HDL, e or Vera - SW: working knowledge DRV/FW development for embedded... more

Mar 01 Sr. Engineer Skillstorm San Diego, CA

Industry experience in modeling using C and systemC. : BSEE/CS, MSEE preferred, with 3+ years of relevant experience. If you feel you meet these requirements, please visit the... more

Mar 01 Embedded Software Positions Technical Link Austin, TX

Industry experience in modeling using C and systemC BSEE/CS, MSEE preferred, with 3+ years of relevant experience 2. Job Description: 4858 This person will be responsible for... more

Mar 01 ASIC Design Verification Engineer Broadcom Irvine, CA

proficiency in C, C++ language required - SystemC/SystemVerilog experience desired - Verilog design experience desired - Knowledge of System Verilog Functional Coverage and... more

Mar 01 Principal System Architect Broadcom San Jose, CA

simulation tools such as NS-2, Opnet, and SystemC. Ability to shape product roadmap from a technical, standards, and technology point of view is required. Strong knowledge of... more

Mar 01 ESL Design & Verification Engineer,... Huawei Technologies Santa Clara, CA

C++/SystemC (TLM2.0) are the primary modeling languages, in both Linux and Windows ... issues and solutions Experts in C++/SystemC and TLM2.0, TCL/Python/scripting... more

Feb 28 Principal System Architect Broadcom San Jose, CA

simulation tools such as NS-2, Opnet, and SystemC. * Ability to shape product roadmap from a technical, standards, and technology point of view is required. * Strong knowledge of... more

Feb 27 Lead Engineer-Systems General Dynamics Santa Clara, CA

point models of DSP algorithms in C/C++/C#, SystemC, Matlab, or Simulink Characterize performance loss versus theory Support implementation and verification teams Assist in... more

Feb 26 Sales Technical Leader, Advanced Verification Technologies Cadence Design Systems Plano, TX

tools [SpecMan], Vera, SystemVerilog or SystemC/C++ is required. Track record of ... + Verilog, VHDL, Specman, Vera, C++, or SystemC Methodologies: URM, OVM and/or VMM... more

Feb 26 Sr Electrical Engineer Rockwell Collins Richardson, TX

functional coverage, SystemC, SystemVerilog) * ASIC / FPGA lab validation with advanced lab equipment * Design for Test (DFT) and manufacturability issues Additional Requirements:... more

Feb 26 Sr Electrical Engineer Rockwell Collins Richardson, TX

functional coverage, SystemC, SystemVerilog) * ASIC / FPGA lab validation with advanced lab equipment * Design for Test (DFT) and manufacturability issues Additional... more

Feb 26 Principal System Architect Broadcom San Jose, CA

simulation tools such as NS-2, Opnet, and SystemC. Ability to shape product roadmap from a technical, standards, and technology point of view is required. Strong knowledge of... more

Feb 26 Principal System Architect Broadcom San Jose, CA

simulation tools such as NS-2, Opnet, and SystemC. Ability to shape product roadmap from a technical, standards, and technology point of view is required. Strong knowledge of... more

Feb 24 Software Engineer, Staff Virage LOGIC Fremont, CA

f multicore SoC system operation. . Java and Eclipse development experience (design and implementation). . Experience with C++ and/or assembler . Exposure to SystemC and/or... more

Feb 24 ASIC Design Verification Engineer Broadcom Irvine, CA

proficiency in C, C++ language required - SystemC/SystemVerilog experience desired - Verilog design experience desired - Knowledge of System Verilog Functional Coverage and... more

Feb 24 Software Development Engineer - GUI Emphasis Mentor Graphics Wilsonville, OR

ces. Our simulation environments incorporate support for unified verification of designs developed in multiple design languages including SystemVerilog, VHDL, and SystemC. Job... more

Feb 24 SoC Senior C++ IC Engineer - GBP2.5m New Op BELFAST NORTHERN IRELAND Altmore Associates Center, TX

general experience, with exposure to C++ / SystemC, SystemVerilog or VHDL - low power design techniques including low power synthesis and power island implementation This position... more

Feb 24 Sr Staff Architect Broadcom San Jose, CA

simulation tools such as NS-2, Opnet, and SystemC. Ability to shape product roadmap from a technical, standards, and technology point of view is required. Strong knowledge of... more

Feb 24 ASIC Design Verification Engineer /... Broadcom Irvine, CA

proficiency in C, C++ language required - SystemC/SystemVerilog experience desired - Verilog design experience desired - Knowledge of System Verilog Functional Coverage and... more

Feb 23 Senior Digital ASIC Design Engineer Toshiba Medical Research Institute USA Redmond, WA

rface design (1Gbps+), development of design document, verification procedure, and verification report * Highly desired experience: Verilog, SystemC, C/C++, Perl, TCL, digital... more

Feb 21 Senior ASIC Design/Verification Engineer STMicroelectronics La Jolla, CA

System Verilog/OVM, e-language, Vera/VMM or SystemC. ? Experience with assertion based verification (SVA and/or PSL) for protocol and property checking. ? Ability to run... more

Feb 20 Senior ASIC Design/Verification Engineer STMicroelectronics La Jolla, CA

analysis. scan/BIST insertion and formal verification. ? Knowledge of coverage driven functional verification environments viz. System Verilog/OVM, e-language, Vera/VMM or... more

Feb 19 Digital Verification Engineer Fusion408 San Jose, CA

in Electrical Engineering is preferred. ? At least seven years of ASIC verification experience ? Solid understanding of C, hdl, Verilog, C++, & SystemC ? SystemVerilog knowledge... more

Feb 19 Digital Verification Engineer Fusion408 San Jose, CA

understanding of C, hdl, Verilog, C++, & SystemC ? SystemVerilog knowledge is plus ? Previous experience working with DSP verification is another plus. ? Basic understanding of... more

Feb 17 Sales Technical Leader , Advanced Verification Technologies Cadence Design Systems San Jose, CA

tools [SpecMan], Vera, SystemVerilog or SystemC/C++ is required. Track record of ... + Verilog, VHDL, Specman, Vera, C++, or SystemC Methodologies: URM, OVM and/or VMM... more

Feb 17 QC Technician 1 BASF East Setauket, NY

related discipline. Knowledge of the Metric Systemc, GMPs and cGLPs requirements. Proficiency in use of a PC and standard operating systems. SAP experience preferred. BASF... more

Feb 17 ASIC / Digital Tranceiver Co-Op InterDigital Communications King of Prussia, PA

methodology including RTL (VHDL, Verilog, SystemC), simulation, synthesis, etc. * Pragmatic knowledge of HW/SW partitioning and implementation of system level functions is... more

Feb 17 Principal System Architect Broadcom San Jose, CA

simulation tools such as NS-2, Opnet, and SystemC. . Ability to shape product roadmap from a technical, standards, and technology point of view is required. . Strong knowledge of... more

Feb 16 EDA Verification Engineer, Senior QUALCOMM San Diego, CA

Strong knowledge of HVLs(VERA), HDLs(Verilog/VHDL/SystemVerilog), C/C++/SystemC. RTL simulation (ModelSim, VCS, Vera), Formal verification techniques (e.g. Model checking,... more

Feb 14 Sr Design Verification Engineer AMD Sunnyvale, CA

perience with C++, Verilog design and simulation is a must, testbench creation and functional coverage with HVL's such as System Verilog or SystemC is a plus, as is experience... more

Feb 14 Sr. Verification Designer Cross Creek Systems Santa Clara, CA

flow Experience with tools - VERA, SystemC, TestBuilder, version control system and bug tracking system EDUCATION: Minimum of Master of Science degree Prefer Electrical... more

Feb 14 Sr Design Verification Engineer AMD Sunnyvale, CA

perience with C++, Verilog design and simulation is a must, testbench creation and functional coverage with HVL's such as System Verilog or SystemC is a plus, as is experience... more

Feb 12 Sales Technical Leader , Advanced Verification Technologies Cadence Design Systems San Jose, CA

tools [SpecMan], Vera, SystemVerilog or SystemC/C++ is required. Track record of ... + Verilog, VHDL, Specman, Vera, C++, or SystemC Methodologies: URM, OVM and/or... more

Feb 12 Processor Architect - Performance Modeling QUALCOMM Austin, TX

n choices. Skills/Experience Knowledge of pipelined multi-core architectures and memory systems Industry experience in modeling using C and systemC BSEE/CS, MSEE preferred, with... more

Feb 12 Software Engineer Intel Hillsboro, OR

High-level Design Language (VHDL), iHDL, SystemC*) - Good understanding of computer architecture and circuit and/or logic design is a plus - Experience in Design for Test and... more

Feb 12 Staff Design Verification Engineer SiRF Technology San Jose, CA

verification using SystemVerilog, SystemC, Vera or Specman. Strong expertise in writing test benches - BFM, monitors, scoreboard/checker, code coverage & functional coverage. Must... more

Feb 12 Senior Architecture and System Design Engineer Broadcom San Diego, CA

level modeling experience desirable such as SystemC or other high level modeling tools - audio processing - security & DRM Education: Master Degree in EE or Computer Science is... more

Feb 12 QC Technician 1 BASF - the Chemical Company East Setauket, NY

related discipline. Knowledge of the Metric Systemc, GMPs and cGLPs requirements. Proficiency in use of a PC and standard operating systems. SAP experience preferred. BASF... more

Feb 11 Sr Software Simulator Developer Ryzen Solutions Sunnyvale, CA

devices for the simulators in C, C++ and SystemC. * You will be working closely with ... * Must have strong C and C++ skill. * SystemC experience desired. * Having both... more

Feb 10 Processor Architect - Performance Modeling QUALCOMM Austin, TX

n choices. Skills/Experience Knowledge of pipelined multi-core architectures and memory systems Industry experience in modeling using C and systemC BSEE/CS, MSEE preferred, with... more

Feb 10 Software Engineer Intel Hillsboro, OR

High-level Design Language (VHDL), iHDL, SystemC*) - Good understanding of computer architecture and circuit and/or logic design is a plus - Experience in Design for Test and... more

Feb 10 Staff Design Verification Engineer SiRF Technology San Jose, CA

verification using SystemVerilog, SystemC, Vera or Specman. Strong expertise in writing test benches - BFM, monitors, scoreboard/checker, code coverage & functional coverage. Must... more

Feb 10 Senior Architecture and System Design Engineer Broadcom San Diego, CA

level modeling experience desirable such as SystemC or other high level modeling tools - audio processing - security & DRM Education: Master Degree in EE or Computer Science is... more

Feb 10 Senior Architecture and System Design Engineer Broadcom San Diego, CA

level modeling experience desirable such as SystemC or other high level modeling tools - audio processing - security & DRM Education: Master Degree in EE or Computer Science is... more

Feb 09 Verification Engineer Lead (Santa Clara) QUALCOMM Santa Clara, CA

building testbenches using Vera or systemC, creating test-suites based on micro-architecture spec and functional spec* Ability to debug design in simulation and Emulation (FPGA)... more

Feb 09 MTS - DFT/DFD Verification Engineer AMD Boxborough, MA

with HVL's such as System Verilog or SystemC is a plus, as is experience with formal verification tools. DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION: The AMD... more

Feb 09 ASIC TEST Methodology / Analog Verification Engine QUALCOMM San Diego, CA

: Utilize hardware design languages Skills and Responsibilities: Verilog Skills and Responsibilities: VHDL Skills and Responsibilities: SystemC Skills and Responsibilities:... more