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Featured Job Postings from the Web
Jul 15 Client Account Manager for Fast Growing I.T. Support Firm Computer Solutions Group Los Angeles, CA

accessible through the service management systemc. Ensure all procedures are followed and documented as required4. Technical Productivitya. Achieve company defined objectives for... more

Jul 08 Principal EDA Software Engineer CAE Recruiters San Jose, CA

abstract specifications written in C++/SystemC and their corresponding RTL implementations and contributing to leading edge software development for this tool. This will involve... more

Jun 27 Verification Engineers Ee-recruiters Santa Clara, CA

tools desiredSkills that are pluses:- C++ or SystemC programmingWhat you'll be doing:- ... Verification, SystemVerilog, OVM / UVM / or VMM, C++ or SystemC, "verification... more

Jun 22 Principal Engineer / Architect Florentina Fox Agency Palo Alto, CA

in MatLab, Verilog & SystemC is highly desirable. Experience in optimizing algorithms & C for multi-core implementation highly desirable. •A history or active participation in... more

Jun 18 C++ Tutoring/Teaching Wyzant Tutoring Aurora, CO

I am anew student in a c++ course. My problem is navigating UNIX and the univ systemC++ Tutoring & Teaching opportunities available in Aurora, CO starting at $25-$50/hr. more

Jun 16 Design Verification Engineers Collabera San Diego, CA

debugging skills. Basic knowledge of SystemC TLM (transaction level modeling) ... (DPI) functions for calling C++ and systemC functions from System Verilog UVM... more

Jun 08 Speech Micro - Architect Intel Santa Clara, CA

in SystemVerilog - Familiarity with SystemC modelling and/or scripting. - Familiarity with a range of Internal and 3rd-Party Logic Design/validation Tools. Preferred... more

Jun 05 Product Validation Engineer/ Sr Member of Technical Staff /T3 Cadence Design Systems Chelmsford, MA

SoC Verification, with a Hardware Verification Language (HVL) like systemC/ Vera or SystemVerilog is a strong match for this position. The person should have a track record in... more

May 29 Analog Design Engineer Cybercoders Irvine, CA

- Behavioral modeling with System Verilog, SystemC, Matlab and other languages - Worked in a Cadence or similar environment What's In It for You - Well-Funded, Exciting, and... more

May 29 Senior ASIC Engineer - DSP Cybercoders Santa Ana, CA

Hands on experience with C/C++, SystemC and/or Matlab a plus - Hands on RTL Design, Debug, verification - Strong hands on STA, Synthesis, DFT, LEC, Formal Verification, BIST,... more

May 29 Analog IC Engineer Cybercoders Mountain View, CA

- Behavioral modeling with System Verilog, SystemC, Matlab and other languages - Worked in a Cadence or similar environment What you'll be doing: - You will be involved with the... more

May 26 Electrical Engineer - Consumer Electronics Survios Los Angeles, CA

experience with design verification using SystemC, SystemVerilog or similarExperience with verification and debugging tools such oscilloscope, multimeter, signal and spectrum... more

Apr 25 Sr Application Engineer Cadence Design Systems San Jose, CA

with a mix of SystemVerilog, SystemC/C/C++, Verilog & VHDL using industry ... SystemVerilog, VHDL, Verilog, C/C++, SystemC * Experience with debug of UVM * Ability... more

Apr 23 Principal Application Engineer Cadence Design Systems San Jose, CA

environments utilizing SystemVerilog, e or SystemC/C++ . Looking for System Verilog and UVM skills. Experience creating a Verification Plan and using verication management tools... more

Apr 07 Staff Application Engineer Cadence Design Systems Austin, TX

environments utilizing SystemVerilog, e or SystemC/C++ . Looking for System Verilog and UVM skills. Experience creating a Verification Plan and using verication management tools... more

Jan 29 Principal R&D Application Engineer Cadence Design Systems San Jose, CA

programming and system simulation using SystemC is a plus * Must have excellent written and verbal communication skills as well as good problem solving skills. * Able to travel... more

Dec 03 Lead Verification Engineer, SoC Cadence Design Systems Austin, TX

Formal (Assertion) Based Verification * SystemC, TLM1.0/TLM2.0 experience * ARM Processor knowledge * Digital Design experience * Other standard bus protocol knowledge (i.e. more

More Job Postings from the Web
Jul 23 Sr. Video Architect Apple California

of c-modeling tools, including C/C++, SystemC and scripting languages such as Perl and/or Python * Knowledge of video coding standards including MPEG-4, H.264, HEVC * Knowledge of... more

Jul 23 Emulation Applications Engineer - 2323 Classifiedads.com Fremont, CA

ASIC debug. * C programming desirable. SystemC and C++ used in conjunction with chip design and verification highly desired. * Must have previous experience with industry... more

Jul 23 SIP Pre-Si Verification Engineer Job Intel Santa Clara, CA

Experience with software like C, C++, SystemC advantage Experience with validation of interconnects/fabrics would be added value. Experience with System Verilog, OVM/Saola... more

Jul 22 Software Development Engineer Intel Oregon

working/hands on knowledge of SystemC/ C / C hands on experience with Virtual Prototyping and System Level Design Flows Additional knowledge: knowledge of developing for simics... more

Jul 22 Product Engineering SW Architect - Semi and System Software Wipro Portland, OR

Embedded SW, C++, SystemC/ TLM2/ Perl/ Python/ Basic Architecture concepts, SW processes?Basic ISA modeling / IP Modeling / Writing Tests / AutomationSOC Modeling ( Func / Cycle... more

Jul 22 SIP Pre-Si Verification Engineer Intel Santa Clara, CA

with software like C, C++, SystemC advantage Experience with validation of interconnects/fabrics would be added value. Experience with System Verilog, OVM/Saola Experience in... more

Jul 21 Embedded HW/SW Design Engineer Job Leidos San Diego, CA

6+ years experience with Verilog, VHDL, SystemC, SystemVerilog, and/or Matlab for the deve ... •Platform exploration (SystemC/TLM) for custom SoC using industry standard tools... more

Jul 21 Computer Architect / Computer Engineer Job Leidos San Diego, CA

4+ years of experience with Verilog, VHDL, SystemC, and/or SystemVerilog for the ... •Platform exploration (SystemC/TLM) for custom SoC using industry standard tools... more

Jul 21 Senior Computer Architect / Computer Engineer Job Leidos San Diego, CA

8+ years of experience with Verilog, VHDL, SystemC, and/or SystemVerilog for the ... •Platform exploration (SystemC/TLM) for custom SoC using industry standard tools... more

Jul 20 ASIC Design Verification Viasat Cleveland, OH

experience * Experience with C++ or SystemC Our Cleveland office is located in Cuyahoga Heights, south of Cleveland. Cleveland is part of the Cleveland+ area of Northeast Ohio,... more

Jul 19 RTL Validation engineer Job Intel Santa Clara, CA

in object-oriented programming such as C++, SystemC and SystemVerilog, assertion languages such as OVA, as well as verification coverage tools and matrices are required. Knowledge... more

Jul 17 Modeling/ Virtual Platform Engineer Sage IT Portland, OR

5+ years of Experience in C/ C++/ SystemC based modeling design, validation ... bench, test environment, development of SystemC test cases as well system regression... more

Jul 16 RTL Validation engineer Intel California

in object-oriented programming such as C , SystemC and SystemVerilog, assertion languages such as OVA, as well as verification coverage tools and matrices are required. Knowledge... more

Jul 16 Sr Principal, Verification Engineer Broadcom San Jose, CA

languages (Verilog/SystemVerilog/SystemC/VHDL), high level languages (C++), ... in languages such as Systemverilog, SystemC, C/C++, Perl, TCL/TK 4) Strong... more

Jul 14 ADMINISTRATIVE ASSISTANT I State of Florida Tallahassee, FL

64083001-51170312-20140601070124 Agency Name: HealthDescription:Working Title: ADMINISTRATIVE ASSISTANT IBroadband/Class Code: 43-6011-02Position Number: 64083001-51170312Annual... more

Jul 14 Patient Care Assistant St. Luke's University Health Network Coaldale, PA

orders using order entry computer systemc) Maintains sufficient unit suppliesd) Maintains unit statistics, manuals and logs as assignede) Communicates between members of the... more

Jul 14 ACCOUNTANT II State of Florida Tallahassee, FL

79010263-51209470-20140709100001 Agency Name: Business and Professional RegulationDescription:Working Title: ACCOUNTANT IIBroadband/Class Code: 13-2011-01Position Number:... more

Jul 13 Computer Algorithms Automatic Speech recognition Intouch Staffing Professionals Sunnyvale, CA

scripting experience middot Knowledge of SystemC US Citizens and all other parties authorized to work in the US are encouraged to apply. We are unable to sponsor H1B Visarsquos at... more

Jul 12 Senior Design Modeling Engineer Encore Semi San Diego, CA

for implementing and supporting C++ and SystemC functional models for the Digital ... video codec protocols• SystemC TLM 2.0 experience• Design and verification environment... more

Jul 12 Design Verification Methodology Deployment Encore Semi San Diego, CA

languages: C, C++, and SystemC.• Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired.• Scripting and... more

Jul 11 iOS Platform Architect Apple California

of c-modeling tools, including C/C++, SystemC and scripting languages such as Perl and/or Python * Experience debugging complex models * Description: As an iOS Platform... more

Jul 11 Senior Digital Design Engineer Job Intel Folsom, CA

- Experience with languages such as C/C++, SystemC, System Verilog, Perl, Specman e, Shell scriptin - Strong ASIC and/or SoC design experience - Experience with industry standard... more

Jul 10 Need Modeling/ Virtual Platform Engineer @ Simplion Technologies Portland, OR

5+ years of Experience in C/ C++/ SystemC based modeling design, validation ... bench, test environment, development of SystemC test cases as well system regression... more

Jul 10 ASIC Design Engineer Staff Juniper Networks Sunnyvale, CA

or SystemVerilog skills • Strong SystemC or C/C++ and Perl/shell scripts skills. • Knowledge of Synopsys Design Compiler is highly desirable • Must have good... more

Jul 10 ASIC Design Staff engineer Juniper Networks Sunnyvale, CA

or SystemVerilog skills • Strong SystemC or C/C++ and Perl/shell scripts skills. • Knowledge of Synopsys Design Compiler is highly desirable • Must have good... more

Jul 10 Analog EDA Application Engineer Texas Instruments Dallas, TX

MATLAB, Verilog, Verilog-A,, Verilog-AMS, VHDL, VHDL-AMS and/or SystemC). * Ability to setup and debug analog and mixed-signal simulations and analyze data in Analog Artist is... more

Jul 10 Instant Closure Need Pre-Silicon Engineer @ Simplion Technologies Milpitas, CA

) or Memory Interfaces ( Flash, DDR, SDIO etc ) or SoC infrastructure blocks ( Bus Infrastructure, DMA etc ).Experience in emulation / systemc is a plus. Good communication... more

Jul 10 Analog EDA Application Engineer Texas Instrutments Dallas, TX

MATLAB, Verilog, Verilog-A,, Verilog-AMS, VHDL, VHDL-AMS and/or SystemC). * Ability to setup and debug analog and mixed-signal simulations and analyze data in Analog Artist is... more

Jul 09 MTS ASIC/ Layout Design Engineer AMD Sunnyvale, CA

SV/VMM, SV, C++, SystemC, Vera, E)
• Mastery of a scripting language (Shell, Perl, Python, Ruby)
• Verification functional coverage using industry standard coverage analysis... more

Jul 09 Mixed Signal Validation Intel Oregon

nd/or their equivalent -6mths industry experience in SOC/ASIC verification -6mths experience in post-si debug and validation -Working knowledge of C/C /SystemC and other high... more

Jul 09 Embedded Software engineer Collabera Grand Rapids, MI

procedures. Familiarity with Linux Operating SystemC Programming Language Required Experience: Creating and linking Objects within the DOORS tool. Knowledge of requirement... more

Jul 09 Pre-Si IP Validation Intel Oregon

f pre-silicon validation (functional, DFT, power, coverage, gate level) - Experience developing models for hardware components in C/C , SystemC or equivalent languages -... more

Jul 09 Senior Digital Design Engineer Intel California

- Experience with languages such as C/C , SystemC, System Verilog, Perl, Specman e, Shell scriptin - Strong ASIC and/or SoC design experience - Experience with industry standard... more

Jul 08 Research Intern- Programming IBM Yorktown Heights, NY

key components of the architecture in a SystemC based cycle-accurate simulator. The ... is expected to have proficiency in C / C++ / SystemC. Knowledge in Java and Python... more

Jul 01 Pre-Si IP Validation Hillsboro, OR

models for hardware components in C/C++, SystemC or equivalent languages * Experience in delivering IPs or integrating IPs working with internal and external customers *Job... more

Jun 30 Enterprise Projections Lead Intel Santa Clara, CA

skills - Verilog, C Desired: - SystemC, SystemVerilog - Matlab - Signal processing Job Category : Engineering Primary Location : Israel- Other Locations :... more

Jun 30 Intern - Network Switch Arch Performance (Fall 2014) Broadcom San Jose, CA

2. Experience with a simulation tool such as SystemC/NS-2/Omnet++ Country US State/Province CA City/Town San Jose Shift 1st Shift - Day Percent of Travel Required None Function... more

Jun 29 Software Development Engineer Hillsboro, OR

Skills: working/hands on knowledge of SystemC/ C++/ C hands on experience with Virtual Prototyping and System Level Design Flows Additional knowledge: knowledge of developing for... more

Jun 28 Staff ASIC Verification Engineer Results Center Santa Clara, CA

Verilog, VCS/NCsim, Modeltech, C-language or SystemC, Vera, Specman, System Verilog. Candidate must show a strong knowledge in the development of chip verification environments... more

Jun 27 Verification Engineer II Job SanDisk Milpitas, CA

include: Developing behavioral models in SystemC and C++ and methodology development for logic design and verification. Evaluation of new RTL design tools and flows. Support of... more

Jun 27 Staff ASIC Verification Engineer Marvell Santa Clara, CA

Verilog, VCS/NCsim, Modeltech, C-language or SystemC, Vera, Specman, System Verilog. Candidate must show a strong knowledge in the development of chip verification environments... more

Jun 26 Staff ASIC Verification Engineer Cameron Resources Group Sunnyvale, CA

with functional modeling using C++ and SystemC Familiarity with System Verilog and OVM/UVM Experience with build tools including make, version control, LSF, Perl, or Ruby... more

Jun 26 Internship: Firmware Engineering Job SanDisk Milpitas, CA

The individual will participate in the development of a system model in SystemC/C++ , help analyze and develop algorithms for flash management, and do systems level performance... more

Jun 26 Terminal Manager Philadelphia, PA

L.b) Monitor the terminal Quality Management Systemc) Review delivery schedule to ensure customers requirements are met.d) Responsible for the training and professional... more

Jun 23 SALES ACCOUNT MANAGER - REMOTE - CATV/MSO American Cybersystems Boston, MA

REMOTE - WORK FROM HOME OPPORTUNITY. PERIODIC TRAVEL REQUIRED. PERMANENT PLACEMENT WITH A MSO/CATV COMPANY. MUST HAVE CURRENT OR PAST EXPERIENCE WORKING WITHIN THE CATV ARENA. more

Jun 23 Engineer Circuit Design 4(14011994) Northrop Grumman Manhattan Beach, CA

and modeling using C/C++, SystemVerilog, or SystemC. Bachelors of Science degree in Electrical or Computer Engineering with a minimum 9 years of relevant experience or 7... more

Jun 19 Client Experience Coordinator (Medxcel) Medxcel Indianapolis, IN

and input information into the systemc. Perform call transfers, when appropriated. Perform calls processes for non-service item related issue when deemed necessarye. Escalate... more

Jun 18 Mixed Signal Validation Hillsboro, OR

and validation * Working knowledge of C/C++/SystemC and other high level languages *Job Category:* Engineering *Primary Location:* USA-Oregon, Hillsboro *Full/Part Time:* Full... more

Jun 13 Team Lead Verification Engineer Teradyne North Reading, MA

and ATE support.* Expert level C/C++, SystemC, System Verilog programming skills are required* Extensive experience with verification EDA tools with ability to optimize... more

Jun 13 CPU Model Engineer ARM Austin, TX

microarchitecture* Prior knowledge of SystemC / TLM2 would be an advantage**General Attributes**It is essential for the successful applicant to:* Demonstrate enthusiasm, drive and... more

Jun 10 Speech Recognition - Computer Algorithms Automatic Speech Engineer Intouch Staffing Professionals Santa Clara, CA

or Python scripting experience Knowledge of SystemC US Citizens and all other parties authorized to work in the US are encouraged to apply. We are unable to sponsor H1B Visarsquos... more

Jun 09 Senior Principal Analog Design Engineer Terran Systems San Jose, CA

with analog behavioral modeling a plus (SystemC, System Verilog, Matlab) ? Self driven, results -oriented individual capabile of working well with a very experienced and proven... more

Jun 06 ASIC Verification Engineer Cameron Resources Group Orlando, FL

software modeling with SystemVerilog, SystemC and OVM ( Open Verification Methodology ) Permanent Employee Benefits Include Flex Work Schedule 401K, Medical, Dental Bonus program... more

Jun 05 Lead Member Technical Staff Mentor Graphics Indiana

to verification environments (SV OVM, SystemC, Vera) is a plus. Knowledge of bus protocols like AMBA, PCIe, USB will be an advantage. Job Qualifications: The person will be... more

Jun 05 Lead Member Technical Staff Mentor Graphics Incorporation Indiana

to verification environments (SV OVM, SystemC, Vera) is a plus. Knowledge of bus protocols like AMBA, PCIe, USB will be an advantage. Job Qualifications: The person will be... more

Jun 03 CPU Model Engineer Artisan Austin, TX

microarchitecture * Prior knowledge of SystemC / TLM2 would be an advantage General Attributes It is essential for the successful applicant to: * Demonstrate enthusiasm, drive... more

Jun 03 CPU Model Engineer Middlesex Community College Austin, TX

microarchitecture * Prior knowledge of SystemC / TLM2 would be an advantage General Attributes It is essential for the successful applicant to: * Demonstrate enthusiasm, drive... more

May 29 Sr Embedded Systems Engineer Medtronic Mounds View, MN

object oriented software language such as SystemC, C, C++, SystemVerilog in the ... integrate a device model in simulation (i.e. SystemC, RTL, Verilog, C) or hardware (i.e. more

May 29 ASSOCIATE ASIC/FPGA Verification Engineer L-3 Communications Camden, NJ

proficiency in C/C++, VHDL. Proficiency with SystemC, System Verilog a big plus. Knowledge of UVM desired but not required. Knowledge of high-speed peripheral interfaces... more

May 20 Emulation Applications Engineer - 2323 Mentor Graphics Fremont, CA

ASIC debug. * C programming desirable. SystemC and C++ used in conjunction with chip design and verification highly desired. * Must have previous experience with industry... more

May 20 Technical Director/Chip Architect Broadcom Irvine, CA

tools such as NS-2, Omnet++, SystemC is highly desirable**Country**US**State/Province**CA**City/Town**Irvine**Shift**1st Shift - Day**Percent of Travel Required**25% -... more

May 20 SW Engr, ESL Simulator Development Cadence Design Systems San Jose, CA

experience profile:* Experience developing SystemC and TLM2 based simulation or debug ... of debugging tools and techniques for SystemC Virtual Platforms is highly... more

May 17 Sr Memberand MTS Eda Careers California

abstract specifications written in C++/SystemC and their corresponding RTL implementations. In this role, you will be directly contributing to leading edge software development... more

May 16 Engineer Circuit Design- 4 Abacus Service Redondo Beach, CA

and modeling using C/C++, SystemVerilog, or SystemC. Requirements:Candidate should have a minimum 9 years of relevant experience in the field of ASIC design and verification with... more

May 15 Developer, Control Systems III First Solar Tempe, AZ

embedded software (C/C++, Assembly, SystemC, etc.). * > 5 years working within an embedded Linux environment * Experience with: * Current software engineering processes and... more

May 15 Engineer Circuit Design- 4 (5) Chipton Ross California

and modeling using C/C++, SystemVerilog, or SystemC. REQUIRED EXPERIENCE: Candidate should have a minimum 9 years of relevant experience in the field of ASIC design and... more

May 12 ASSOCIATE ASIC/FPGA Verification Engineer L-3 Camden, NJ

proficiency in C/C , VHDL. Proficiency with SystemC, System Verilog a big plus. Knowledge of UVM desired but not required. Knowledge of high-speed peripheral interfaces... more

Apr 28 Pre- Silicon Verification-(252689) Compnova Santa Clara, CA

Expertise in c/c++ and systemC. Knowledge of Specman/e a plus.• Knowledge of emulation and writing testbenches for emulation a plus. Excellent communication and team work skills. more

Apr 28 Verification Architect Compnova Hudson, MA

Expertise in C/C++ and systemC. Knowledge of Specman/e a plus. Knowledge of emulation and writing testbenches for emulation a plus. Excellent communication and team work skills. more

Apr 23 Senior Application Engineer FV Mentor Graphics Indiana

Company: Mentor Graphics Job Title: Senior Application Engineer FV - 2362 Job Location: ... using directed tests, constraint random testing, assertions and coverage driven... more

Apr 23 Lead Engineer Mentor Graphics Indiana

sure to ARM assembly language, ARM processor architecture, ARM Fast Models, QEMU are a plus. Exposure to Verilog/VHDL/System Verilog, SystemC and functional verification tools... more

Apr 23 Lead Engineer Mentor Graphics Incorporation Indiana

Exposure to ARM assembly language, ARM processor architecture, ARM Fast Models, QEMU are a plus. Exposure to Verilog/VHDL/System Verilog, SystemC and functional verification... more

Apr 18 Design Verification Engineer AMD Sunnyvale, CA

functional modeling using C++ and SystemC preferred • Familiarity with System Verilog and OVM/UVM preferred • Experience with build tools including make, version control, LSF,... more

Apr 08 Emulation Applications Engineer Mentor Graphics Incorporation Fremont, CA

general ASIC debug. C programming desirable. SystemC and C++ used in conjunction with chip design and verification highly desired. Must have previous experience with industry... more

Apr 08 Emulation Applications Engineer Mentor Graphics Fremont, CA

SystemC and C++ used in conjunction with chip design and verification highly desired. ��� Must have previous experience with industry emulation solutions, as well as simulation... more

Apr 04 System Performance Modeling Engineer Job Micron Milpitas, CA

- C/C++, and systemC experience. - An understanding of how to use the Standard Template Library (STL). - The ability to quickly react and adapt to changes based on modeling... more

Apr 04 Software Engineer Hillsboro, OR

* Minimum of 5 years experience in applied SystemC high level synthesis (HLS) ... assurance. Preferred Requirements Skills: systemC or C++, including advanced... more

Mar 26 Verification Technologist Mentor Graphics Austin, TX

coverage required. HVL Expertise in SystemC and other HVLs considered a plus. Understanding of Low Power and mixed signal issues that affect verification Previous background in... more

Mar 10 Senior Application Engineer FV Mentor Graphics Incorporation Indiana

SystemVerilog and desirable e, Vera, PSL, SystemC knowledge Simulation/Verification using directed tests, constraint random testing, assertions and coverage driven verification... more

Mar 10 Sr. Engineer, ASIC Design/Verification Sustainable Recruitment Concepts San Jose, CA

ec standards such as H.264, MPEG-2 or VP8 Knowledge of new H.265/HEVC standard a big plus Language: Verilog/VHDL, SystemVerilog, C/C++/SystemC, Scripting language Tools:... more

Mar 07 Staff R&D Simulation Tools Engineer Synopsys Sunnyvale, CA

new features for the transaction level SystemC models as well as cycle accurate ... Experience with SystemC 2.x, OSCI SystemC, TLM 2.0 API standards a plus ·... more

Jan 07 Sr. Verification Designer Cross Creek Systems Santa Clara, CA

flow Experience with tools - VERA, SystemC, TestBuilder, version control system and bug tracking system EDUCATION: Minimum of Master of Science degree Prefer Electrical... more

Jan 07 Field Applications Engineer Cross Creek Systems Palo Alto, CA

LAPACK a plus Knowledge of RTL (Verilog/VHDL/SystemC) or Digital Signal Processors a plus DETAILED JOB DESCRIPTION: Work closely with sales on developing new prospects by... more

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