SystemC jobs
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Featured Job Postings from the Web
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| May 21 | Software System Design Engineer | Mediatek | Dedham, MA |
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th processor modeling highly desirable. Strong C++ programming skills highly desirable. Experience with large-scale programming projects, SystemC development, HDLs such as... more |
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| May 20 | IC Design Verification (All Levels) | Broadcom | Austin, TX |
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PERL, TCL programming skills. - SystemC, System Verilog or assertion based verification background a plus. - Strong system and block level reference modeling skill. - Excellent... more |
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| May 15 | Verification Application Engineer | Cadence Designs | Austin, TX |
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utilizing SystemVerilog, Vera, e or SystemC/C++ . Strong team player with a ... Languages: SystemVerilog, Specman, Vera, SystemC, C++, Methodologies: Preferable... more |
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| May 14 | Verification Application Engineer | Cadence Design Systems | Austin, TX |
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utilizing SystemVerilog, Vera, e or SystemC/C++ . Strong team player with a ... Languages: SystemVerilog, Specman, Vera, SystemC, C++, Methodologies: Preferable... more |
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| May 08 | Sr. Member of Technical Staff | Cadence Designs | San Jose, CA |
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in programming languages including PERL, SystemC, Specman, C, C++ a plus. The ideal person should be an expert user on major industrial simulators, synthesizers and FPGA design... more |
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| May 08 | Virtual Platform Architect | QUALCOMM | San Diego, CA |
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design principles Preferred Expertise in SystemC and Transaction Level Modeling ... design principles * Preferred Expertise in SystemC and Transaction Level Modeling... more |
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| May 08 | Incisive Product Expert [ Simulation] | Cadence Designs | San Jose, CA |
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experience using SystemVerilog/e/SystemC/Vera - Hands on Design experience using Verilog, VHDL - Knowledge of Verification IP, and code & functional coverage technologies -... more |
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| May 03 | Incisive Product Expert [ Simulation] | Cadence Design Systems | San Jose, CA |
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experience using SystemVerilog/e/SystemC/Vera - Hands on Design experience using Verilog, VHDL - Knowledge of Verification IP, and code & functional coverage technologies -... more |
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| May 01 | Technical Lead Advanced Verification Technologies | Cadence Designs | Austin, TX |
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with a focus on SystemVerilog and SystemC implementations. Your duties will ... Strong SystemC / C++ skills are a real plus. Languages: SystemC, C++, SystemVerilog, Specman,... more |
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| May 01 | Sr Design Verification Engr | Cadence Designs | San Jose, CA |
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knowledge of Verilog, VHDL, SystemVerilog, SystemC, C++ or Specman-e; scripting languages: PERL, TCL, bash/sh *Knowledge of standard protocols such as PCIe, Ethernet, USB3.0,... more |
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| Apr 30 | IC Design Verification for Mobile Platforms (All levels) | Broadcom | Longmont, CO |
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PERL, TCL programming skills. - SystemC, System Verilog or assertion based verification background a plus. - Strong system and block level reference modeling skill. - Excellent... more |
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| Apr 29 | Staff ASIC Design Verification Engineer | Emulex | Austin, TX |
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technologies such as VERA, SPECMAN or SystemC Proficiency with VMM or UVM Solid debugging skills Solid communication and desire to grow into a mentorship and technical leadership... more |
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| Apr 23 | Sr. Member of Technical Staff | Cadence Design Systems | San Jose, CA |
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in programming languages including PERL, SystemC, Specman, C, C++ a plus. The ideal person should be an expert user on major industrial simulators, synthesizers and FPGA design... more |
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| Apr 15 | SOC ASIC Designers | Fortune 500 | San Jose, CA |
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with functional modeling using C++ and SystemC preferred Familiarity with System Verilog and OVM/UVM preferred Experience with build tools including make, version control, LSF,... more |
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| Apr 15 | SoC Verification Engineer - Senior and Junior | Fortune 500 | San Jose, CA |
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in networking protocols Experience in using SystemC / TLM for system modeling and building virtual prototypes Good communication and documentation skills Proactive attitude,... more |
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| Apr 09 | Staff Verification Engineer-Complex Connectivity Chips | Fabless Semiconductor - Location / Wifi / Bluetooth | Austin, TX |
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verification using SystemVerilog, SystemC, Vera or Specman. Strong expertise in writing test benches - BFM, monitors, scoreboard/checker, code coverage & functional coverage. Must... more |
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| Jan 30 | Technical Lead Advanced Verification Technologies | Cadence Design Systems | Austin, TX |
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with a focus on SystemVerilog and SystemC implementations. Your duties will ... Strong SystemC / C++ skills are a real plus. Languages: SystemC, C++, SystemVerilog, Specman,... more |
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| Dec 13 | Sr Design Verification Engr | Cadence Design Systems | San Jose, CA |
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knowledge of Verilog, VHDL, SystemVerilog, SystemC, C++ or Specman-e; scripting languages: PERL, TCL, bash/sh Knowledge of standard protocols such as PCIe, Ethernet, USB3.0, MIPI,... more |
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| Jun 08 | SW Engr, ESL Simulator Development | Cadence Design Systems | San Jose, CA |
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experience profile: Experience developing SystemC and TLM2 based simulation or debug ... of debugging tools and techniques for SystemC Virtual Platforms is highly... more |
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More Job Postings from the Web
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| May 20 | FPGA Software Engineer (Learn Trading Systems) | Leverage Group IT | New York, NY |
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in HDL languages including VHDL and/or Verilog Experience with HDL simulation and synthesis tools A working knowledge of System Verilog and/or SystemC is a plus High speed... more |
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| May 20 | FPGA Software Engineer for High Frequency Trading Systems | Leverage Group | New York, NY |
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A top Tier Hedge Fund is seeking a technologist with experience in FPGAs and software to join there research labs team You will be responsible for ... is not necessary... more |
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| May 20 | Systems Software Developer - FPGA / C++ - New York City | Leverage Group | New York, NY |
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Candidates must have a strong GPA from a top university Will relocate the right candidate Responsibilities Face a wide array of technical challenges ... Engineer Verilog VHDL... more |
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| May 19 | Senior Staff Engineer- SSD Software Development | Western Digital | San Jose, CA |
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software life cycle and common practices. * SystemC/TLM experience * Proficient in C++, C, C#, in depth knowledge of object oriented programming principles * Full understanding of... more |
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| May 19 | Embedded Software Engineer | Synergy Seven | Hudson, MA |
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Strong SystemC / C++ skills and demonstrated experience using these languages. 3. Demonstrated experience on both Windows and UNIX OS's, including using GCC and Visual Studio for... more |
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| May 18 | Specman Verification Engineer | Volt Information Sciences | Folsom, CA |
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of experience in Testbench Development with SystemC or C++. * Experience with BFM, Monitor and/or Collector. * Checkers and Scoreboarding experience. * 5 or more years of Test... more |
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| May 18 | Senior Electrical Systems Analyst (Modelling & Simulation) | Rolls Royce | Indianapolis, IN |
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such as VHDL-AMS, Verilog, Verilog A, MAST, SystemC, SysML and simulation languages such as C, C++, FORTRAN, etc * Knowledge of gas turbine engines and requirements of gas turbine... more |
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| May 18 | Senior Electrical Systems Analyst (Modelling & Simulation) | Rolls-Royce | Indianapolis, IN |
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such as VHDL-AMS, Verilog, Verilog A, MAST, SystemC, SysML and simulation languages such as C, C++, FORTRAN, etc * Knowledge of gas turbine engines and requirements of gas turbine... more |
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| May 17 | ASIC Verification Applications Engineer | CAE Recruiters | Waltham, MA |
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Embedded Programming Programming (SystemC/C++/C) Processor and system architecture (ARM, MIPs, etc) RTL (Verilog and VHDL) Backgrounds (from any of the below): Embedded HW/SW... more |
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| May 17 | System Verification Engineer, Senior-IEB-Hardware (772953) Job | Microsoft | Mountain View, CA |
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ce CPU core or Graphics core verification Emulation and hardware acceleration Design experience or ability to write synthesizable models SystemC experience Performance modeling... more |
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| May 17 | FPGA Engineer | Bittware | Concord, NH |
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A working knowledge of System Verilog andor SystemC is a plus High speed design including SerDes andor Memory is a plus Knowledge in board design debug and production a bonus DSP... more |
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| May 15 | z Systems Engineer / Posted 3-16-12 | Formalized Design | Folsom, CA |
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simulation, performance analysis using SystemC and TLM2 Autonomy Additional Skills Desired, but not required: * Basic knowledge of Verilog, VHDL and EDA tools * Expertise in... more |
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| May 15 | Math | Spirit of Math America-edison | Manahawkin, NJ |
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Math teaching methodology and administrative systemc) Delivering lessons to studentsd) Grading students assignments, tests and examse) Building and maintaining relationships with... more |
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| May 15 | Teacher | Spirit of Math America-edison | Manahawkin, NJ |
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Math teaching methodology and administrative systemc) Delivering lessons to studentsd) Grading students assignments, tests and examse) Building and maintaining relationships with... more |
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| May 15 | z Embedded SW Engineer/Posted 2-19-12 | Formalized Design | Hudson, MA |
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embedded software or device drivers * Strong SystemC/C++ skills and demonstrated experience using these languages * Demonstrated experience on both Windows and UNIX OS's,... more |
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| May 14 | System Verification Engineer, Senior-IEB-Hardware (772953) | Jobserve USA | Mountain View, CA |
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e CPU core or Graphics core verification Emulation and hardware acceleration Design experience or ability to write synthesizable models SystemC experience Performance modelling... more |
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| May 14 | CAE, Staff | Synopsys | California |
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for Verilog, VHDL, SystemVerilog and SystemC(tm). A VCS Senior Corporate Applications Engineers prime responsibility is to deploy VCS at customer sites. The job responsibilities... more |
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| May 14 | Modeling Engineer | Freescale Semiconductor | Indiana |
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cores and full fledged SoCs and knowledge of SystemC would be an added plus. Experience in ... skill(s): C++ (UNIX environment), OOAD, SystemC * At least 2 year(s) of working... more |
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| May 14 | Verification Engineer II (NCG) | SanDisk | Milpitas, CA |
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Development of behavioral models with object oriented language in C++/SystemC. Evaluation and support of digital simulation tools/flows on design methodology. Development of... more |
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| May 12 | Sr. ASIC Verification Engineer | Hirenetworks | Raleigh, NC |
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tools, hardware design and debug, SystemC and other programming languages are a plus. Experience working with OVM, or Specman e is a plus Experience working with Emulators,... more |
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| May 12 | Member of Technical Staff | Altera | San Jose, CA |
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(HVL) like SystemVerilog testbench and SystemC Hardware description languages (HDL), Verilog and SystemVerilog * Experience on Design verification tools like ModelSim /VCS and... more |
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| May 11 | Electrical Systems Analyst (Modelling & Simulation) | Rolls Royce | Indianapolis, IN |
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such as VHDL-AMS, Verilog, Verilog A, MAST, SystemC, SysML and simulation languages such as C, C++, FORTRAN, etc * Knowledge of gas turbine engines and requirements of gas turbine... more |
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| May 11 | Engineer, Principal - IC Design | Broadcom | Sunnyvale, CA |
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designs. Knowledge of Verilog/VHDL languages, RTL design/verification, and of ASIC design methodology. Knowledge of systemC,C/C++, Perl, TCL or other scripting languages is... more |
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| May 11 | Electrical Systems Analyst (Modelling & Simulation) | Rolls-Royce | Indianapolis, IN |
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such as VHDL-AMS, Verilog, Verilog A, MAST, SystemC, SysML and simulation languages such as C, C++, FORTRAN, etc * Knowledge of gas turbine engines and requirements of gas turbine... more |
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| May 10 | Staff II ASIC Verification EngineerEngineer | Broadcom | San Jose, CA |
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(will consider other such as Vera, SpecmanE, SystemC, or C++) Familiar with SystemVerilog Assertions Strong experience in ASIC design verification flows and DV methodologies Hands... more |
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| May 10 | Verification Engineer | Xpeerant | Boxborough, MA |
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understanding of computer architecture systemC SV and X86 assembly programming is a plus Experience with assertion based design strategies code coverage functional coverage etc is... more |
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| May 09 | Sr or Jr Design Verification Engineer | Apple | Cupertino, CA |
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environments, SystemVerilog, and SystemC is a plus. Should be a team player with excellent communication skills and the desire to take on diverse challenges. BS, MS, or PHD in... more |
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| May 08 | Lead ASIC/FPGA Verification Engineer | L-3 Communication Systems - East | Camden, NJ |
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o Very strong proficiency in VHDL, C/C++, SystemC, System Verilog (Assertions). o Working experience in OVM/UVM testbench development, functional coverage and constrained random... more |
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| May 08 | Sr. ASIC Design Engineer | Hirenetworks | Raleigh, NC |
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tools, hardware design and debug, SystemC and other programming languages are a plus Desired application domain experience in one or more of the following areas (Networking,... more |
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| May 08 | Hardware Security Engineer | QUALCOMM | San Diego, CA |
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languages: SystemVerilog, VHDL, Verilog, SystemC - FPGA/ASIC design 5)Side channel attacks, power analysis and timing attacks on crypto elements 6)ARM Trustzone, Virtualization... more |
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| May 08 | Virtual Platform Development Engineer | QUALCOMM | San Diego, CA |
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Embedded Software Preferred Experience in SystemC and Transaction Level Modeling ... Embedded Software * Preferred Experience in SystemC and Transaction Level Modeling... more |
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| May 08 | VERIFICATION ENGINEER -Microprocessor SOC Design | Gcr Professional Services | Boxborough, MA |
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understanding of computer architecture, systemC, SV, and X86 assembly programming is a plus. - Experience with assertion based design strategies, code coverage, functional... more |
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| May 07 | SOC Architect | Intel | Austin, TX |
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automation tools such as System RDL, SystemC, or other similar tools Job Category : Engineering Primary Location : USA-Oregon, Hillsboro Other Locations : USA-Texas, Austin... more |
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| May 04 | Verification Engineer | Synergy Seven | Santa Clara, CA |
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a green card 10+ years experience: C++ or SystemC is required as is Testbench development using standards like OVM, UVC, etc. bfm, monitor, collector - checkers, scoreboarding -... more |
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| May 04 | Sr. R&D Engineer (Simulation) - 460 | Tensilica | Santa Clara, CA |
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Studio environment Good working knowledge of SystemC is a plus MS/PhD degree in CS/EE in computer architecture, system software, or a related field LOCATION: Santa Clara, CA... more |
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| May 03 | Processor System Modeling Engineer | LSI LOGIC | Mendota Heights, MN |
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(e.g., Ethernet controller). . Fluent in SystemC transaction-level modeling with demonstrated use of open source libraries (e.g., TLM 2.0). . Strong knowledge of modeling... more |
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| May 02 | Processor System Modeling Engineer | LSI | Mendota Heights, MN |
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(e.g., Ethernet controller). Fluent in SystemC transaction-level modeling with demonstrated use of open source libraries (e.g., TLM 2.0). Strong knowledge of modeling trade-offs... more |
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| May 02 | System Verification Engineer | Maxim Integrated Products | Sunnyvale, CA |
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and languages such as UVM, systemVerilog and systemC is advantageous - Peripheral driver design (e.g. Ethernet, SPI, I2C, UART) - Operating systems: Windows, Linux - Masters or... more |
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| May 01 | MTS ASIC Design Verification Engineer | AMD | Sunnyvale, CA |
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with functional modeling using C++ and SystemC preferred Familiarity with System Verilog and OVM/UVM preferred Experience with build tools including make, version control, LSF,... more |
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| May 01 | Principal ASIC Verification Engineer | Advantex Professional Services | Irvine, CA |
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Skills *Framer experience with SONET or OTN *Networking domain knowledge (e.g. Ethernet, ATM, SONET, GFP, OTN) *SVA, PSL or OVL assertions *SystemC or C++ experience *Formal... more |
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| Apr 30 | Senior Corporate Application Specialist | Carbon Design Systems | Acton, MA |
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Embedded Programming Programming (SystemC/C++/C) Processor and system architecture (ARM, MIPs, etc) RTL (Verilog and VHDL) Backgrounds (from any of the below): Embedded HW/SW... more |
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| Apr 30 | Senior Verification Engineer - OVM, UVM, or VMM | Cybercoders | Mountain View, CA |
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etc) Skills that are pluses: - C++ or SystemC programming - Experience in SVA, OVL or PSL assertions - DSP What you'll be doing: - Responsible for developing leading edge... more |
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| Apr 26 | Apps Consultant, Sr II | Synopsys | California |
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ASICs using OpenVera, SystemVerilog or SystemC/C++ is required Experience with verification methodologies such as VMM, OVM or UVM is preferable Understanding of standard bus... more |
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| Apr 24 | Systems Architect - SoC Systems Modeling and System Architecture Exploration | Freescale Semiconductor | Texas |
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etc, based) * A strong object oriented C/C++/SystemC programming background * Experience with scripting languages, e.g. Python, Perl. * A background in statistical analysis and... more |
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| Apr 24 | Jr. Embedded SW Engineer (C/C++) | Mavensoft Technologies | Hudson, MA |
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Strong SystemC/C++ skills and demonstrated experience using these languages. 3. Demonstrated experience on both Windows and UNIX OS's, including using GCC and Visual Studios for... more |
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| Apr 24 | Senior Engineer SSD Software Development | Western Digital | San Jose, CA |
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programming and interface * TLM 2.0 and SystemC knowledge and previous work experience. Job Discipline Engineering Primary Location US-California-San Jose Schedule Full-time... more |
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| Apr 20 | Software Embedded Engineer | eTech Recruiters, Inc. Dba eTech Resources. | Hudson, MA |
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Strong SystemC/C++ skills and demonstrated experience using these languages. 3. Demonstrated experience on both Windows and UNIX OS's, including using GCC and Visual Studios for... more |
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| Apr 19 | Embedded Software Engineer | Everest Consultants | Hudson, MA |
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embedded software or device drivers.- Strong SystemC/C++ skills and demonstrated experience using these languages.- Demonstrated experience on both Windows and UNIX OS's,... more |
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| Apr 17 | SoC Simulation Software Engineer (Qualcomm Research San Diego) | QUALCOMM | San Diego, CA |
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/ DSP architecture. Experience with SystemC / TLM 2.0, JIT compilers, LLVM, Windows, and Linux is preferred. Skills in compiler design (optimization, code generation), virtual... more |
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| Apr 17 | Embedded Processor Firmware Engineer | Stec | San Diego, CA |
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on simulation on the system model platform (SystemC TLM 2.0), RTL based simulation ... - Cadence Incisive Enterprise Simulator - SystemC TLM 2.0 modeling - Hard Disk and/or... more |
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| Apr 13 | ASIC Design Verification Engineer- New Verification Environments! | Emulex | Austin, TX |
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technologies such as VERA, SPECMAN or SystemC * Proficiency with VMM or UVM * Solid ... debugging, ASIC Design, ASIC, VERA, Specman, SystemC Job Information Job Id... more |
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| Apr 11 | Verification Engineer | Cybercoders | San Jose, CA |
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Perl, Shell, Python) - HW behavioral modeling in SystemC, C/C++, etc is a plus What you'll be doing: - Top-level system & unit verification of IP cores against the golden C-model... more |
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| Apr 10 | ASIC Design Sr Manager | Juniper Networks | California |
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* Strong Verilog, SystemC or C/C++, Perl/shell scripts or Vera programming skills. * Must have good leadership/communication skills. * Networking experience is highly desirable,... more |
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| Apr 08 | SW System COMPILER Architect Designer | Woburn, MA | |
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th processor modeling highly desirable. Strong C++ programming skills highly desirable. Experience with large-scale programming projects, SystemC development, HDLs such as... more |
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| Mar 27 | Sr. Staff Verification Engineer - Processors | Sunnyvale, CA | |
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verification using SystemVerilog, SystemC, Vera or Specman. Strong expertise in writing test benches - BFM, monitors, scoreboard/checker, code coverage & functional coverage. Must... more |
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| Mar 26 | Sr. ASIC Verification Engineer | Protingent | San Jose, CA |
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controller Proficiency in C/C++, Verilog, SystemC Experience with PLI/VPI, SystemVerilog is plus Candidates may directly to: 11436-MH2210@apply.maxhire.net Benefits Package:... more |
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| Mar 23 | Psychiatry - Physician | Merritt Hawkins | Iowa |
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Psychiatry opening in , Iowa. This and other physician jobs brought to you by DocCafe. Big Ten University Community$250,000+ Income PotentialYou will find that years of visionary... more |
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| Mar 23 | Sr. Verification Designer | Cross Creek Systems | Santa Clara, CA |
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flow ? Experience with tools - VERA, SystemC, TestBuilder, version control system and bug tracking system EDUCATION: Minimum of Master of Science degree Prefer Electrical... more |
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| Mar 22 | SoC Verification Engineer | Samsung | San Jose, CA |
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networking protocols o Experience in using SystemC / TLM for system modeling and building virtual prototypes o Programming skills (C/C++, Python, Perl) Good communication and... more |
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| Mar 20 | Design/Validation Engineer | eTech Recruiters, Inc. Dba eTech Resources. | Folsom, CA |
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Design/Validation Engineer - 5963 6 month contract Folsom, CA FM-4 Primary Skill: ... in Electrical Engineering, Computer Engineering, or Computer Science Verdi/Debussy... more |
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| Mar 19 | Sr. Verification Engineer | SanDisk | Milpitas, CA |
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Assertions and behavioral modeling in SystemC and C++. Support of design and ... languages such as Vera, Specman, SystemC or C++ are also beneficial. SanDisk... more |
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| Mar 12 | Hardware Verification Engineer | Altera | San Jose, CA |
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hardware design and debug in Verilog HDL * SystemC and TLM2.0 * VMM, UVM, OVM, AVM * Understanding of SDC and timing closure * Related networking applications * Build tools such... more |
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| Mar 09 | ASIC Design Sr. Staff | Juniper Networks | California |
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Verilog, or SystemVerilog skills Strong SystemC or C/C++ and Perl/shell scripts skills. Knowledge of Synopsys Design Compiler is highly desirable Must have good... more |
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| Mar 01 | ASIC Verification Requirements: | Terran Systems | Santa Clara, CA |
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Strong experience in SystemVerilog, SystemC, Vera, or E language VMM/OVM/UVM experience Strong object oriented programming C++ and scripting languages Perl/Tcl capabilities Good... more |
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| Feb 29 | Senior Staff Firmware Engineer | Stec | Santa Ana, CA |
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set experience. Knowledge on concepts of SystemC and TLM 2.0. Experience in development of transaction level models in C/C++/HDL. Knowledge of statistical and numerical analysis... more |
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| Feb 28 | Win8 PNP Analysis Architect | Intel | Hillsboro, OR |
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to Performance and Power modeling with RTL/SystemC - Performance and Power projection methodologies and correlation to silicon would be plus - Excellent problem solving and... more |
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| Feb 28 | SoC Verification Engineer | Tara Technical Solutions | San Jose, CA |
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USB, or FLASH controller Experience in using SystemC / TLM for system modeling* Programming skills (C/C++, Python, Perl)MS degree with 3+ years of relevant experience or BS degree... more |
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| Feb 24 | Virtual Platform Architect | Esquire Staffing Company | San Diego, CA |
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design principles Preferred Expertise in SystemC and Transaction Level Modeling techniques Preferred Expertise in Designing C++ Models for IP Blocks for SoCs. OS - Win32,... more |
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| Feb 08 | Staff Design Verification Engineer | SiRF Technology | Sunnyvale, CA |
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verification using SystemVerilog, SystemC, Vera or Specman. * Strong expertise in writing test benches - BFM, monitors, scoreboard/checker, code coverage & functional coverage. *... more |
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| Feb 07 | ASIC / FPGA Lead / Manager - Great Career Opp. | Connected Systems Partners | Massachusetts |
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of the following: C/C++, scripting, Vera or SystemC Any experience in the networking domain is a plus. All qualified candidates are encouraged to contact me directly with any... more |
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| Feb 01 | Senior Staff Engineer SSD Software Development | 63241028000000 Ssd Eng | San Jose, CA |
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- SOP/SAS Experience - Knowledge of statistical and numerical analysis on data - Database programming and interface - TLM 2.0 and SystemC knowledge and previous... more |
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| Jan 31 | Staff Design Verification Engineer | CSR Technology | Sunnyvale, CA |
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verification using SystemVerilog SystemC Vera or Specman Strong expertise in writing test benches BFM monitors scoreboardchecker code coverage functional coverage Must be a team... more |
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| Jan 16 | Computer Architecture Researcher | Extreme Networks | California |
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using simulation languages such as SystemC or Verilog is required. Programming experience using scripting languages such as Python or Perl is a required. Good knowledge and... more |
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| Jan 11 | 5 Openings for ASIC SoC Verification- The Bay | Tara Technical Solutions | San Jose, CA |
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and flash controller networking protocols SystemC / TLM for system modeling and building virtual prototypes MS degree with 5+ years of relevant experience or BS degree with 7... more |
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| Jan 09 | Senior Design Verification Engineer | Maxim Integrated Products | Sunnyvale, CA |
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Object Oriented Programming System Verilog/SystemC, or Aspect Oriented Programming ... & implementation using HVLs (System Verilog/SystemC/e) - Verification Planning -... more |
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| Dec 05 | Staff Applications Engineer (H/W) | Applied Micro Circuits | Sunnyvale, CA |
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using HVL languages like System Verilog/SystemC/Vera. * Hands on experience using the RISCWatch/BDI JTAG debuggers, PCIe, SATA and USB Protocol Analyzers, IXIA Traffic Generators,... more |
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| Dec 05 | Staff Design Engineer | Applied Micro Circuits | Sunnyvale, CA |
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like SystemVerilog, Vera, Specman, or SystemC * Knowledge and proven experience in coverage-driven and assertion-based verification methodology * Experience in using advance... more |
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| Nov 30 | Staff Engineer- SSD Software Development | 63241028000000 Ssd Eng | San Jose, CA |
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life cycle and common practices. - SystemC/TLM experience - Proficient in C++, C, C#, in depth knowledge of object oriented programming principles - Full understanding... more |
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| Sep 26 | Associate Research Scientist | Northeastern University | Boston, MA |
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System Level Design Language (SLDL) such as SystemC or SpecC is a must. The NIST (National Institute of Standards and Technology) funded VOTERS (Versatile Onboard Traffic Embedded... more |
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| Jun 20 | Lead ASIC Verification Eng | Global Network Recruiting | New York, CA |
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and languages (SystemVerilog / Specman / SystemC / UVM). Experience working in the embedded systems would be beneficial, but not key. On a personal level the successful candidate... more |
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| May 03 | Engineer, Digital IC Design | Marvell Technology Group | Chandler, AZ |
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ssess tradeoffs between performance, power, frequency, and complexity. The candidate should have strong programming skills in C/C++ and SystemC and understand microprocessor... more |
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