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Featured Job Postings from the Web
Dec 17 Full Time permanent Position || UPF Design Verification Engineer@ Okaya Austin, TX

position for UPF Design Verification Engineer @ Austin, TX. Please share your ... TO APPLY ! Role - UPF Design Verification Engineer, Job Type - Full Time Permanent,... more

Dec 17 wcdma modem software engineer Sasken Communication Technologies Newport Coast, CA

path ndash Working very closely with ASIC engineer to come up with the data path ... (408) 458-9985 (USA) Emailkiran.kurapatisasken.com WCDMA, RF, 3g, 4g, ASIC, ADI,... more

Dec 16 Design Engineer Xtreme Consulting Group Hillsboro, OR

clock tree synthesis (CTS), APR, static timing analysis, ERC, DRCLVS, RV, Noise ... and ultra-low power IC designs is a plus vlsi, asic, soc, perl, tcl, synopsys,... more

Dec 15 Verification Engineer Ee-recruiters Santa Clara, CA

Job Description: SOC Verification Engineer As an SOC Verification Engineer, you ... and ideas succinctly. "verification engineer", "asic Verification", OVM, UVM,... more

Dec 15 Diagnostics Engineer (AKS) IDC Technologies San Jose, CA

is suitable for you. Role Diagnostics Engineer Mandatory Technical Skills Roles and ... for system, board, FPGA and ASIC design verification and validation in... more

Dec 12 Hardware verification engineer Provalid Boston, MA

Job Description Wanted Expert verification engineer looking for a more flexible work environment with challenging work Feel like your skills are underutilized in your current... more

Dec 12 Principal Design Engineer Cadence Design Systems San Jose, CA

design and verification. Experienced with ASIC design flow, hierarchical physical ... Solid knowledge on LP Design, DFT, static timing analysis, EM/IR-Drop/crosstalk analysis,... more

Dec 11 Principal Engineer Emulex San Jose, CA

• Take on the lead role for major portions of ASIC design and be able to drive Staff/Senio ... participate in the synthesis/static timing analysis. • Define and implement the top... more

Dec 11 Position: Diagnostics Engineer Apttech Solutions San Jose, CA

Position: Diagnostics Engineer Location: San Jose, CA Duration: 1 year Diagnostics ... for system, board, FPGA and ASIC design verification and validation in... more

Dec 10 Full Chip Design/Verification Engineer Judge Group San Jose, CA

Job Description: JobRequirement - Full Chip FPGADesign/Verification Engineer -JO#433864) L ... for functional,electrical and timing verification including static timing... more

Dec 10 Principal ASIC Design Engineer Ee-recruiters San Jose, CA

matching) verification, synthesis and static timing analysis of next generation optical ... (LEC) and static timing analysis. ASIC, SOC, Optical, SERDES, Networking,... more

Dec 09 Software Engineer (Embedded Systems) Lexmark International Lexington, KY

Lexmark is seeking Software Engineers to join our Embedded Systems Development team. Our devices are sophisticated Linux-powered systems that combine cutting-edge compute... more

Dec 09 Firmware Engineer - Embedded / Firmware / Product development Randstad Engineering Charlotte, NC

Responsibilities for the Firmware Engineer Own software development activities ... 68000, 68hc11, 8088, algorithms, asic, assemblers, ate, bit, calibration,... more

Dec 09 Principal Analog Design Engineer Global Manufacturer of Advanced Semiconductor Solutions Boise, ID

and development tools. - Working with ASIC design engineers to develop analog and ... - Working with a team of back-end ASIC designers to implement CMOS analog... more

Dec 08 Manufacturing Test Engineer (Logic Board) Cadence Design Systems San Jose, CA

Position Description The Manufacturing Test Engineer should have the ability to excel in a ... DDR4 DIMMs or SODIMMs, Optics and high end ASIC’s or processors and Ethernet. Produce... more

Dec 07 Senior or Staff Hardware Engineer (Base Management Controller) Emulex San Jose, CA

of Base Management Controller (BMC) ASIC post silicon validation. Work with ... 2.0/3.0, SPI) • Experience with new ASIC bring up and validation • 3 plus years of... more

Dec 07 Principal Sys Design Engineer Leader In Data Storage Solutions Milpitas, CA

Work with controller ASIC designers to ensure self-adoption/calibration routines are supported and develop a roadmap of new capabilities for future implementation. Qualifications:... more

Dec 06 Engineer: Component Design III - :ITEKJP00004148 Collaborative Vision Hillsboro, OR

Job Description: Engineer: Component Design - III -ITEKJP00004148 Senior ASIC/SOC Design E ... Minimum 5 years of experience in design or ASIC/SOC design experiences including... more

Dec 05 ASIC Architect (Senior / Principal) Leader of Telecommunication Equipment and Related Services San Jose, CA

10+ years of high performance, and complex ASIC/COT development Strong knowledge of high ... design methodology and complexity of timing closure options BS/MS Degree in... more

Dec 05 Senior Project Engineer - Electromechanical Micro Miniature Products Tap Maumelle, AR

multi-gigabit connectors, chip sockets, ASIC packaging, micro miniature connectors and sheet metal contacts. REQUIRED SKILLS & ABILITIES: Expertise in the use of analytical tools,... more

Dec 04 Software Engineer in RF Development - Newport Beach Sasken Communication Technologies Newport Coast, CA

system. ndash Working very closely with ASIC engineer to come up with the data path ... WCDMA Modem, RF Developement, ASIC,3G/4G,Base... more

Dec 04 Electrical Electronics Engineer Aernnova Engineering Ann Arbor, MI

of skills and interests including custom ASIC, FPGA, PCB, real-time embedded software, ... Design opportunities include: Custom ASIC design, verification, and physical place... more

Dec 01 Principal System Manufacturing Test Engineer Cadence Design Systems San Jose, CA

Position Description The System Manufacturing Test Engineer/Architect should have the abil ... DDR4 DIMMs or SODIMMs, Optics and high end ASIC’s or processors and Ethernet. Produce... more

Nov 29 Hardware Design Engineer ManTech International Annapolis Junction, MD

as Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array ... new P&R tools, P&R tool updates, and ASIC or FPGA design libraries into... more

Nov 29 Advanced Memory Systems RTL Lead Engineer Global Manufacturer of Advanced Semiconductor Solutions Boise, ID

IC Compiler, etc.), SystemC. Education: A BS in Electrical or Computer Engineering or similar and 5+ years of logic/system design experience including ASIC design/development. ,... more

Nov 28 Principal Verification Engineer San Jose, CA

related industry experience in Mixed-Signal ASIC/SoC Verification - Expert knowledge of Object Oriented Programming System Verilog/SystemC - Hands on experience and knowledge of... more

Nov 28 Verification Engineer Aerotek Phoenix, AZ

Job Description: The ideal candidate with have a degree in Electrical or Computer Engineer ... * Previous experience with some stage of a specific vendors design tools for ASIC/FPGA dev... more

Nov 28 Principal Physical Design Engineer Method3 Chandler, AZ

Principal Physical Design Engineer Location Chandler, AZ Job Description In this highly ... Physical Design of Micro-controller (MCU), ASIC andor SOC designs. Experience leading... more

Nov 24 Principal Engineer Development Emerson Eden Prairie, MN

simulate and release designs using Cadence ASIC design tools Familiar with the Calibre verification tool Education MSEE or better with focus on CMOS analog design Additional... more

Nov 21 Front-End Application Engineer - ICD/FED Cadence Design Systems San Jose, CA

Mobile Customers * Senior level Application Engineer position supporting RTL-to-GDS ... Design Constraints, DFT and Deep Static Timing Analysis for a number of ASIC... more

Nov 21 Physical Design Application Engineering Manager Cadence Design Systems San Diego, CA

synthesis, in place optimization, routing, timing analysis/closure and ECO tasks (timing, ... extraction, EM/IR Drop Analysis, timing and Signal Integrity closure, physical... more

Nov 21 Sr Applications Engineer Cadence Design Systems San Jose, CA

Mobile Customers * Senior level Application Engineer position supporting RTL-to-GDS ... Design Constraints, DFT and Deep Static Timing Analysis for a number of ASIC... more

Nov 16 Senior Manager / Manager Software Engineering, Multicast Leading Provider of Networking Solutions San Jose, CA

Lead a multi-geo team of seasoned designers and software engineers to innovate and deliver cutting edge multicast features on the campus and data center networking platforms. Work... more

Nov 13 Senior Product Engineer - ASIC Design Global Safety Products Company Farmington Hills, MI

of Application Specific Integrated Circuits (ASIC) and Application Specific Standard ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Oct 31 Lead Business Analyst, Principal - IT / ASIC, EDA A New Beginning-genesis 2 Santa Clara, CA

An understanding of ASIC design engineering tools and methods a plus. Proven ability ... of ASIC development lifecycle, EDA tools, and experience with Integrated Circuit... more

Oct 31 Staff Engineer Emulex San Jose, CA

actively participate in silicon debug with ASIC team and co-ordinate debug activities ... 7+ Years of relevant experience Masters in Computer Science/Electrical/Electronic Engineer... more

Oct 30 Principal Engineer Steinman Recruiting Associates Cleveland, OH

system architects, logic designers, the ASIC development team and CAD engineering. You ... solving and debugging skills. Static timing analysis of synchronous interfaces. An... more

Oct 23 Principal Digital Design Engineer Global Manufacturer of Advanced Semiconductor Solutions Boise, ID

are not limited to: - Working with a team of ASIC, firmware, and software engineers to ... with third-party partners and vendors of ASIC intellectual property and development... more

Oct 08 Senior Hardware Design Engineer Imagination Technologies Santa Clara, CA

RTL blocks Synthesizing for power, area and timing Working with the verification team to ... our Sn Francisco office Logic design, RTL, ASIC, IP, Verilog or VHDL, GPU, computer... more

Sep 17 Senior Engineering Director / Technologist - Innovator - Site Leader Emulex Austin, TX

Bring firmware, driver and/or ASIC technical expertise Be a critical thinker with a strong ... execution across engineering functions (ASIC, FW, Driver, Test) Virtual RDMA... more

Sep 16 Principal Hardware Engineer - High Speed Digital Design & Development Emulex San Jose, CA

new technology. As our Principal Hardware Engineer you will: Aid in the design, ... Prior experience working with ASIC and firmware team for complex ASIC validation. more

Sep 10 Sr. Digital / Mixed-Signal Design Engineer Cameron Craig Group Pocatello, ID

complex timing constraints, static timing analysis, closing timing, ATPG, and ... - Experience with industry standard digital design/ASIC tools... more

Sep 09 Staff Engineer - Metrology Novati Technologies Austin, TX

& Defense markets. Job Description: Staff Engineer, Metrology – Austin, TX Full-time – ... Metrology and Yield Development Engineer on Production and Customer Projects Data... more

Aug 30 Engineering Consultant AT&T Corporate Support Atlanta, GA

AT&T’s new, entrepreneurial internal consulting team performs high-impact functions, such as leading strategic and analytics-driven cost reduction projects, deal restructuring,... more

Jul 10 Senior Engineer - Firmware Emulex San Jose, CA

the data center is seeking a Senior Firmware engineer. In this role you will be involved ... firmware for a converged networking ASIC Masters with 3+ years of industry... more

Jun 27 Principal Engineer - Firmware Emulex San Jose, CA

data center is seeking a Principal Firmware engineer in San Jose, California. The ... and PCIe analyzers Experience in working on ASIC and FPGA platforms. Relocation... more

More Job Postings from the Web
Dec 17 Senior ASIC/SOC Design Engineer eTech Resources Sacramento, CA

Description: Commercial Business Manager - 8079 Permanent, FT position in Sacramento, CA Description: Become an integral part of a diverse team that leads the world in Mission,... more

Dec 17 Internship: ASIC Characterization Engineer Job SanDisk Milpitas, CA

Internship: ASIC Characterization Engineer Job Apply now » Date: Dec 17, 2014 Location: ... Secondary Market: Palo Alto Job Segment: Engineer, Intern, Engineering, Entry Level... more

Dec 16 Digital ASIC Design Careers at Qualcomm - Server SoC Team (Austin TX) QUALCOMM Raleigh, NC

Skills/Experience: This position requires detailed knowledge of ASIC design including arch ... systems, RTL design, synthesis, and timing closure. Specific experience with... more

Dec 15 Sr. ASIC Design and Verification CAE Recruiters Lowell, MA

Broadly experienced Digital Design Engineer to architect, design and verify ... RTL design, verification, synthesis and timing analysis. Candidate will be expected... more

Dec 15 ASIC Design Engineer Synergy Seven Hillsboro, OR

5 years of experience in VLSI design or ASIC/SOC design experiences including ... clock tree synthesis (CTS), APR, static timing analysis, ERC, DRC/LVS, RV, Noise... more

Dec 11 ASIC Engineer It-scient San Jose, CA

and let me know your interest. Position: ASIC Engineer Location: San Jose, CA ... for system, board, FPGA and ASIC design verification and validation in... more

Dec 10 Senior ASIC/SOC Design Engineer Tekopinc Hillsboro, OR

5 years of experience in VLSI design or ASIC/SOC design experiences including ... clock tree synthesis (CTS), APR, static timing analysis, ERC, DRC/LVS, RV, Noise... more

Dec 08 ASIC design/pre-sales manager Technical Professionals San Jose, CA

an experienced ASIC Pre-sales Support Engineer with strong ASIC frontend and ... needs and challenges with implementing ASIC solutions to effectively advocate on... more

Dec 08 Senior Electrical or Computer Engineer - ASIC/FPGA Rockwell Collins Cedar Rapids, IA

Government Systems Communication Engineering ASIC/FPGA design team. As an engineer in this ... resource tradeoffs, timing analysis and timing closure â?¢ Proficiency using ASIC... more

Dec 07 Sr Staff ASIC Design Engineer Broadcom Santa Clara, CA

Job Posting Title Sr Staff ASIC Design Engineer Business Unit Infrastructure and ... high performance communications/networking ASIC products. Experience in mapping... more

Dec 07 Senior Digital ASIC/SOC Design Engineer Nationwide Technical & Executive Search Colorado Springs, CO

Senior Digital ASIC/SOC Design EngineerColorado Springs, CODigital ASIC Design Engineer to ... P/G and floorplanning, timing and physical constraints, gated CTS, MCMM setups, back-annot... more

Dec 05 ASIC Architect (Senior / Principal) Ericsson San Jose, CA

Req ID: 14449 ASIC Architect, Networking Processors (Senior / Principal) San Jose, CA, USA ... design methodology and complexity of timing closure options BS/MS Degree in... more

Dec 05 Electrical Engineer/ASIC Verilog Design/Verification Superior Group Scottsdale, AZ

IMMEDIATE NEED FOR AN EXPERIENCED ELECTRICAL ENGINEER Responsibilities / Expectations ... experience in Verilog/System Verilog based ASIC verification. Must be comfortable with... more

Dec 05 Engineer, Senior Digital ASIC Design Marvell Santa Clara, CA

- Develop test-bench for module/block-level verification - Perform timing closure and signal integrity - Perform limited amount of physical design including floorplanning, DRC and... more

Dec 05 ASIC Design Engineer Technical Link Raleigh, NC

design performance achievement including timing closure assistance SkillsExperience ... verification, synthesis, LINT and static timing analysis, clock domain crossing... more

Dec 04 ASIC-FPGA Design Engineering - Internship Seagate Round Rock, TX

and application-specific integrated circuit (ASIC) Projects for High Performance SSD ... • Oversees definition, design, verification, and documentation for FPGA/ASIC development... more

Dec 04 Sr. ASIC Verification and Design Engineer Fortemedia Santa Clara, CA

signal processing technologies; define ASIC verification specification and develop infrastructure database; create test cases for Design-under-Verification (DUV) and test vectors... more

Dec 03 ASIC-FPGA Verification Engineer - Entry Level Seagate Round Rock, TX

application-specific integrated circuit (ASIC) Projects for High Performance SSD Storage ... verification techniques for FPGA and ASIC designs in Seagate's SSD division. more

Dec 01 Bell Labs - High Speed ASIC Design Researcher - 214 Alcatel-lucent Murray Hill, KY

degree in Electrical Engineering or Master degree with >1 year of ASIC design/layout experience. · Strong hands-on experience and publications in the design, layout and testing of... more

Nov 26 ASIC Design Engineer Ambarella Santa Clara, CA

Synthesize and optimize RTL for timing, area and power. Developing frontend methodologies and tool flows. Participating in chip bringup. Requirements Masterrsquos degree in... more

Nov 25 Senior ASIC/SOC Design Engineer Vanderhouwen & Associates Hillsboro, OR

5 years of experience in VLSI design or ASIC/SOC design experiences including ... clock tree synthesis (CTS), APR, static timing analysis, ERC, DRC/LVS, RV, Noise... more

Nov 25 Senior ASIC/SOC Design Engineer #23951 Vanderhouwen & Associates Hillsboro, OR

5 years of experience in VLSI design or ASIC/SOC design experiences including ... clock tree synthesis (CTS), APR, static timing analysis, ERC, DRC/LVS, RV, Noise... more

Nov 25 Senior Digital Design Engineer (ASIC/RTL design, synthesis, and timing closure) Encore Semi San Diego, CA

Senior Digital Design Engineer - Implementation Location: San Diego, California Skills / E ... development and validation, timing analysis, formal verification Education: BSEE... more

Nov 25 Senior ASIC/SOC Design Engineer #2 Hillsboro, OR

Senior ASIC/SOC Design Engineer #23951 Contract position for 1 year To apply copy and past ... clock tree synthesis (CTS), APR, static timing analysis, ERC, DRC/LVS, RV, Noise... more

Nov 25 ASIC Design Engineer Job Micron Milpitas, CA

Req ID: 15367 As an ASIC Design Engineer at Micron Technology, Inc., your role will be ... in using synthesis, simulation, static timing analysis, power analysis (plus). -... more

Nov 24 Staff Digital Design Engineer (ASIC/RTL/Mixed Signal) Ethan Alexander Group San Jose, CA

Staff Digital Design Engineer Job Description: Define and implement RTL designs for MEMS ... design experience Experience with synthesis, timing analysis, and gate level simulations... more

Nov 24 Senior ASIC Verification Engineer Marvell Technology Group Santa Clara, CA

*will be involved in developing verification strategy, test plan and verification enviornment geared towards verifying complex networking protocol *will lead and own several... more

Nov 17 ASIC Digital Design Engineer 3coast Pasadena, CA

US Citizens. Position: ASIC Digital Design Engineer Location: Pasadena, CA Compensation: ... eDA tools, e.g. simulation, synthesis, PAR, timing analysis. Excellent verbal and written... more

Nov 15 ASIC Designer 5 - CAD Tools Development Engineer(14019319) Northrop Grumman Baltimore, MD

The Electronics Engineers/CAD Developers will be responsible for ASIC digital design flow ... level simulation (Mentor Questa), static timing analysis (Synopsys Primetime), logic... more

Nov 12 Engineering Program Manager, ASIC Apple Santa Clara, CA

* Job Number: 36363568 * Address: Santa Clara Valley, California, United States * Posted: Nov. 12, 2014 * Category: Corporate * Job Summary: As a Program Manager for Apple SoC... more

Nov 05 Design Automation Engineer - ASIC Evo Phoenix, AZ

flow development for the Cadence Encounter ASIC toolset. REQUIRED: Experience using the ... synthesis Auto-place-and-route, static timing analysis Physical verification... more

Nov 01 Timing Engineer Artech Information Systems Cary, NC

engineers to analyze timing results, write timing ECOs to close design timing ... experience with Static Timing Analysis, timing constraints debug, and timing... more

Oct 23 Staff ASIC Engineer Commnexus San Diego, CA

California. Overview We are seeking an ASIC Design Engineer to be an important team ... industrial experience in ASIC design Solid ASIC design experience including architecture... more

Oct 22 Principal ASIC Design Engineer (DSP Experience Required System-On- Chip Relocation Available) Kore1 Technologies Irvine, CA

opening for a Principal ASIC Design Engineer. Job Responsibilities: The Principal ... synthesis and supporting timing closure. • Experience with design tools such... more

Oct 21 SR. PHYSICAL DESIGN / TIMING ENGINEER NVIDIA Santa Clara, CA

PHYSICAL DESIGN / TIMING ENGINEER Job ID 1752453 Location US, CA, Santa Clara Description ... PHYSICAL DESIGN / TIMING ENGINEER #1752453 DESCRIPTIONS / RESPONSIBILITIES: - Implementati... more

Oct 21 ASIC Physical Design Architect Hitachi Global Storage Technologies Austin, TX

requirements. You will collaborate with ASIC designers and other engineering ... the timing, power and area targets for the ASIC. Your contributions will have an immediate... more

Oct 13 ASIC Physical Design Lead Engineer Avago Technologies Indiana

be required to do equivalence checks, STA, Timing Si and noise closure, power ... have experience formal verification and timing analysis and Eco implementation. more

Oct 08 Timing Engineer APN Software Services Raleigh, NC

experience with Static Timing Analysis, timing constraints debug, and timing ... engineers to analyze timing results, write timing ECOs to close design timing... more

Oct 07 ASIC/FPGA Design Engineer with Security Clearance 2020itservices Fort George G Meade, MD

ASIC/FPGA Design Engineer Clearance Required: An active TS/SCI clearance with fullscope/li ... Expert level experience with Synopsys and/or Cadence tools for synthesis, static timing an... more

Oct 07 Verification Engineer - ASIC Fusion408 Raleigh, NC

multimillion gate ASICs. The Verification Engineer will be responsible for a wide ... work on cutting-edge technology within the ASIC design industry * Competitive salary *... more

Sep 23 Principle Engineer 0 Airbag Safety ASIC Design Conexess Group Livonia, MI

5 + years of mixed signal ASIC development/design and/or automotive electronic design expe ... or Verilog and verification/validation of ASIC design desired. Additional... more

Sep 11 Sr. ASIC Design Engineer (Timing Verification & Signoff) Intel Hillsboro, OR

full chip timing methodology and guide timing convergence aspects for ASIC design ... **Job:** *Engineering* **Title:** *Sr. ASIC Design Engineer (Timing Verification &... more

Sep 11 Sr. ASIC Design Engineer (Timing Verification & Signoff) Hillsboro, OR

full chip timing methodology and guide timing convergence aspects for ASIC design ... Experience in timing and power signoff methodology development, timing corners/modes defin... more

Sep 11 ASIC/ Layout Design Engineer 2 AMD Sunnyvale, CA

of Application-Specific Integrated Circuits (ASIC) development from definition, ... and test. Must have knowledge of ASIC flows and tools. Requires knowledge and... more

Sep 08 Intern - ASIC Design Engineer Infinera Sunnyvale, CA

Work would involve participation in ASIC design; development of minor modules, creating ... Write scripts to automate some tasks of the ASIC design/verification process... more

Aug 21 Senior Synthesis/Timing Engineer" Job Intel Irvine, CA

Senior Synthesis/Timing Engineer" - 735403 Description Responsibilities: - In this role, t ... requires thorough knowledge of the ASIC design synthesis and timing closure flow... more

Aug 19 ASIC/ Layout Design Engineer 2 Amd | Seamicro Sunnyvale, CA

of Application-Specific Integrated Circuits (ASIC) development from definition, ... Requires demonstrated technical expertise in ASIC design and/or verification including -... more

Aug 14 Hardware Design Verification Engineer - NOT ASIC Enphase Energy Petaluma, CA

seeking a Hardware Design Verification Engineer specializing in product testing for compliance and homologation to international standards. This important role supports the... more

Aug 11 Timing Engineer Randstad Technologies - New Raleigh, NC

engineers to analyze timing results, write timing ECOs to close design timing ... experience with Static Timing Analysis, timing constraints debug, and timing... more

Aug 11 Senior Product Engineer - ASIC Design TRW Automotive Holdings Farmington Hills, MI

5 + years of mixed signal ASIC development/design and/or automotive electronic design expe ... and verification/validation of ASIC design desired. Additional Information: Direct... more

Aug 07 MTS ASIC Design Engineer Cameron Resources Group Orlando, FL

an ASIC Design Engineer, you will: Develop ASIC architecture and micro-architecture ... test cases, and test benches Synthesis and Timing methodology Develop code for embedded... more

Jul 23 Engineering Technician CM Level II - Full Time American Engineering Testing Rapid City, SD

10. Communicate with client, contractor and engineer OTHER REQUIREMENTS 1. Ability to ... standards of industry including ASTM, ASIC, and ACT as well as state laws governing... more

Jun 16 ASIC RTL Design Engineer Google Mountain View, CA

* Participate in synthesis, timing/power closure and FPGA/silicon bring-up ... * Experience with ASIC design verification, synthesis, timing/power analysis and DFT... more

Jan 07 ASIC Design Engineer Cross Creek Systems Santa Clara, CA

We are looking for ASIC Design Engineers with a BSEE/MSEE and at least 7-10 years of exper ... work with the physical design team to close timing and area goals. Requirements: BSEE... more

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