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Sep 19 Sr ASIC Design Engineer (Circuit Integration) Jobs at Intel Hillsboro, OR

required areas described below to join its ASIC Design Services Physical Design ... integration and ASIC implementation and timing signoff methodology of high frequency,... more

Sep 19 Sr ASIC/SoC Design Engineer (PV/RV) Jobs at Intel Hillsboro, OR

requirements, timing budgeting and efficient timing closure Performing circuit ... full chip timing methodology and guide timing convergence aspects for ASIC design... more

Sep 17 Jr. FPGA Engineer - FPGA ASIC Design Python Perl - Chicago Global Automotive Services Naperville, IL

JOB TITLE:Jr. FPGA Engineer JOB LOCATION: Chicago, IL JOB CODE: B-233 Attention – Applicant – Fastest way to be in front of the hiring Manager For Full Time Permanent Position... more

Sep 17 Jr. FPGA Engineer - FPGA ASIC Python Perl Quality Resources Solution Chicago, IL

JOB TITLE:Jr. FPGA Engineer JOB LOCATION: Chicago, IL JOB CODE: B-233 Attention – Applicant – Fastest way to be in front of the HIRING MANAGER... more

Sep 17 Jr. FPGA Engineer - FPGA ASIC Design Python Perl - Chicago, IL Manufacturing Services Group Aurora, CO

JOB TITLE:Jr. FPGA Engineer JOB LOCATION: Chicago, IL JOB CODE: B-233 Attention – Applicant – Fastest way to be in front of the HIRING MANAGER... more

Sep 17 Jr. FPGA Engineer - FPGA ASIC Design Python Perl - Chicago, IL IT Services Group Aurora, CO

JOB TITLE:Jr. FPGA Engineer JOB LOCATION: Chicago, IL JOB CODE: B-233 Attention – Applicant – Fastest way to be in front of the hiring Manager For Full Time Permanent Position... more

Sep 17 Senior Engineering Director - Networking Solutions Champion Emulex Austin, TX

Bring firmware, driver and/or ASIC technical expertise Be a critical thinker with a strong ... execution across engineering functions (ASIC, FW, Driver, Test) Virtual RDMA... more

Sep 16 Leader, Engineering (Electrical)United States Thermo Fisher Scientific South San Francisco, CA

CIS * Hands-on experience in RTL design, timing closure, verification system ... design integration engineers on static timing analysis, power, and logic checks *... more

Sep 16 Principal Hardware Engineer - High Speed Digital Design & Development Emulex San Jose, CA

new technology. As our Principal Hardware Engineer you will aid in the design, ... Prior experience working with ASIC and firmware team for complex ASIC validation. more

Sep 16 Jr. FPGA Engineer - FPGA ASIC Design Python Perl Engineering Test Services Group Chicago, IL

JOB TITLE:Jr. FPGA Engineer JOB LOCATION: Chicago, IL JOB CODE: B-233 Attention – Applicant – Fastest way to be in front of the hiring Manager For Full Time Permanent Position... more

Sep 16 ASIC/SOC Implementation Methodology Engineer Intel Hillsboro, OR

Intel's leading edge process technology. The ASIC Design Services team within Intel Custom ... skills through relevant experiences with ASIC/SOC design convergence and tapeout. more

Sep 16 ASIC Design Manager Ee-recruiters Santa Clara, CA

Lead and manage project teams throughout the ASIC development cycle for production ... or Computer Engineering - a must * MS in EE is a plus ASIC, Foundry, RTL, Timing, DRC,... more

Sep 16 Sr. ASIC Design Engineer (Timing Verification & Signoff) Intel Hillsboro, OR

full chip timing methodology and guide timing convergence aspects for ASIC design ... Experience in timing and power signoff methodology development, timing corners/modes defin... more

Sep 12 Product Engineer - Product Manager / Telecommunication / Hardware Randstad Engineering San Jose, CA

installation engineer, electrical field engineer, electrical design engineer, ... engineer, mechanical engineer, development engineer, electro-mechanical engineer,... more

Sep 12 ASIC/FPGA Design Verification Engineer Firstpass Engineering Phoenix, AZ

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... Find out more at www.firstpasseng.com Job Description: ASIC/FPGA Verification Engineer The... more

Sep 12 Senior ASIC/FPGA Design Engineer Firstpass Engineering Phoenix, AZ

Senior FPGA/ASIC Design Engineer The ideal candidate will have a Bachelor’s Degree in Elec ... for basic verification, synthesis, timing closure of the design. • Solid understanding... more

Sep 12 ASIC Designers (Staff, Sr Staff, Principal, Sr. Mgr, or Architects) SK Hynix Memory Solutions San Jose, CA

ASIC Designers (Senior Staff/Principle)– 1-2 openings Requirements: MS with 7 years or BS ... logic design and verification, timing closure, test vector generation, DMA,... more

Sep 12 Senior ASIC/FPGA Verification Engineer Firstpass Engineering Phoenix, AZ

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... www.firstpasseng.com Job Description: Senior ASIC/FPGA Verification Engineer The ideal... more

Sep 12 ASIC/FPGA Design Engineer Firstpass Engineering Phoenix, AZ

ASIC/FPGA Design Engineer The ideal candidate with have a degree in Electrical or Computer ... • Previous experience with some stage of a specific vendors design tools for ASIC/FPGA dev... more

Sep 10 Microelectronics Engineer, Electrical Engineer, Computer Engineer, Mechanical Engineer National Security Agency (NSA) Fort George G Meade, MD

Engineer, Electrical Engineer, Computer Engineer, Mechanical Engineer Job ID: 1049611 ... - Application Specific Integrated Circuit (ASIC) Digital and Analog Design - Verilog or... more

Sep 10 Systems Engineer - Customer Applications Support / Embedded C Programming / USB/Ethernet/CAN Randstad Engineering San Jose, CA

field engineer,electrical design engineer,bseeswitch engineer,switch ... engineers,radio engineer,rf development engineer,rf development,radio... more

Sep 09 Sr ASIC Applications Engineer Intel Santa Clara, CA

judgement. ## Qualifications Position: Sr ASIC Applications Engineer Description: Now ... ASIC performance. * Solid understanding of timing concepts , Spice simulation and StarRC... more

Sep 08 Sr Electrical Engineer - ASIC/FPGA Rockwell Collins Cedar Rapids, IA

Systems Communication Engineering ASIC/FPGA design team. As an engineer in this ... design, resource tradeoffs, timing analysis and timing closure. • Testbench... more

Sep 06 Principal Engineer - EVT Emulex San Jose, CA

firmware for a converged networking ASIC Minimum Qualifications: Bachelor's with 12+ years of industrial experience. Strong experience in Scripting languages(Perl, Python, shell... more

Sep 05 Senior Product Engineer - ASIC Design Global Safety Products Company Farmington Hills, MI

of Application Specific Integrated Circuits (ASIC) and Application Specific Standard ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Sep 05 Principal Engineer - ASIC Functional Safety Manager Global Safety Products Company Farmington Hills, MI

Job Summary: The ASIC Functional Safety Engineer position in TRW Global Electronics ... and development Experience in mixed signal ASIC development/ design is highly desired... more

Aug 29 Electrical Hardware Engineer for Commercial Notebooks HP Houston, TX

Team as a Senior Electrical/Hardware Engineer. This team will develop next ... teams. • Interface with board and ASIC component suppliers, including but not limited... more

Aug 29 Senior ASIC Physical Design Engineer Connetics San Jose, CA

and Northern),Colorado,MN as an ASIC physical design engineer - Working as ... clock distribution, power distribution, timing-driven place and route, timing... more

Aug 25 Design IP Delivery Engineer Cadence Design Systems San Jose, CA

knowledge of Verilog, synthesis, and static-timing analysis - Time management skills ... - Experience with Verilog, Static Timing scripts and report analysis -... more

Aug 20 Pre-Sales Engineer (ASIC / IP / Packaging) Semiconductor Solutions eSilicon San Jose, CA

in ASIC Physical design: Timing analysis using Static Timing Analysis '(STA); ... Timing closure; Timing Signoff Methodology; Low power techniques Experienced in... more

Aug 12 Sr Electrical Engineer-ASIC/FPGA Rockwell Collins Cedar Rapids, IA

Systems Communication Engineering ASIC/FPGA design team. As an engineer in this ... design, resource tradeoffs, timing analysis and timing closure • Testbench... more

Aug 12 Digital ASIC Electrical Hardware Engineer HP Vancouver, WA

be responsible for creating synthesis and timing constraints to meet design performance ... with firmware engineers to make sure that ASIC hardware is used correctly and... more

Aug 08 ASIC Design Engineer NVIDIA Santa Clara, CA

ASICs, RTL design and synthesis, Logic and Timing verification using leading edge CAD tools and Semiconductor process technologies5 Currently enrolled in BSEE, MSEE or PhD... more

Jul 10 Senior ASIC Design Engineer ( Frontend ) Radiant Systems San Diego, CA

Skills/Experience: Experience in front-end ASIC EDA design flow and methodology from syste ... emulation, etc. Experience in front-end ASIC design analysis tasks and related data... more

Jun 27 Principal Engineer - Firmware Emulex San Jose, CA

data center is seeking a Principal Firmware engineer. Fill in the role of architect for ... and PCIe analyzers. Experience in working on ASIC and FPGA platforms. Required Skills... more

Jun 15 Electrical Hardware Engineer HP Fort Collins, CO

ASICs. Our designs are built to meet timing, power, and manufacturability requirements. The team consists of persons strong in both automated and custom circuit design... more

May 28 Sr Applications Engineer Cadence Design Systems San Jose, CA

Mobile Customers * Senior level Application Engineer position supporting RTL-to-GDS ... Design Constraints, DFT and Deep Static Timing Analysis for a number of ASIC... more

May 12 Principal Firmware Engineer Emulex San Jose, CA

data center is seeking a Principal Firmware engineer. In this role you will be involved ... firmware for a converged networking ASIC BS/MS + 10 Years experience Strong... more

Apr 25 ASIC Power Analysis Design Support Engineer with Security Clearance 2020itservices Fort George G Meade, MD

ASIC Power Analysis Design Support Engineer Must be a US Citizen who can obtain a TS/SI cl ... of ASIC designs. In addition, maintain the ASIC power analysis tools. Qualifications:... more

Apr 24 Principal Application Engineer Cadence Design Systems San Jose, CA

Mobile Customers * Senior level Application Engineer position supporting RTL-to-GDS ... Design Constraints, DFT and Deep Static Timing Analysis for a number of ASIC... more

Apr 23 Digital Sign-Off Sr. Application Engineer Cadence Design Systems Cary, NC

in applying TEMPUS/VOLTUS/QRC to large ASIC, mixed-signal and low-power designs * ... timing libraries, design constraints, static timing analysis and underlying timing... more

Mar 06 Senior Software Development Engineer - Hardware Systems Verification (Member of Consulting Staff) Cadence Design Systems San Jose, CA

you are a solid contributor in the FPGA or ASIC space and have delivered great results on an FPGA verification tool chain. You are confident to own the end to end software chain... more

More Job Postings from the Web
Sep 18 Real-time Software Engineer MIT Lincoln Laboratory Lexington, MA

Systems Group seeks an experienced software engineer to support our major real-time signal processing programs and their implementation using open architecture-based principles. more

Sep 18 Intern - ASIC Verification Engineer Infinera Sunnyvale, CA

scripts to automate some tasks of the ASIC design/verification process.</li><li>Create tools to automate testing of ASICs in the lab.</li><li>Technical... more

Sep 18 Principal Product ASIC Air Bag Safety Engineer TRW Automotive Farmington Hills, MI

AIRBAG ASIC ENGINEER Product Overview: Cognitive Safety Systems’ remarkable power to help ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Sep 17 Senior ASIC Engineer - DDR2/3 - RTL Cyient San Jose, CA

Compiler, RTL-CompilerGood knowledge in timing constraintsExpertise in STA using ... communication skillsShould mentor and guide ASIC design EngineersCyient is an equal... more

Sep 16 ASIC/Embedded SW Developer - 848 Apex Systems Burlington, MA

has an opportunity for an Embedded SW Engineer role in the Boston Metro-West area. ... 1. ASIC/Frimware dev 2. embedded software engineer with at least 5 years dedicated to... more

Sep 16 Principal ASIC Design Engineer Fortinet Sunnyvale, CA

to RTL implementation; · Perform ASIC/FPGA verification, synthesis, timing ... Requirement: MSEE/MSCS Principal ASIC Design Engineer Do you enjoy analyzing complex probl... more

Sep 16 Principal ASIC Design Engineer Fortinet Technologies Sunnyvale, CA

atwww.fortinet.com. Principal ASIC Design Engineer Do you enjoy analyzing complex ... to RTL implementation;· Perform ASIC/FPGA verification, synthesis, timing... more

Sep 14 Senior or Lead Engineer - ASIC Physical Design Ericsson San Jose, CA

Req ID: 23950 Tech Lead Engineer - ASIC Physical Design Smart Services Router San Jose, ... routing, implementation (using Verilog), timing closure, synthesis of complex ASICs. Must... more

Sep 12 ASIC Design Engineer Mjk Concepts Valencia, CA

improvement to people's quality of life. ASIC DESIGN ENGINEER Job Function & ... Completion of multiple ASIC project cycles from concept/specification through production... more

Sep 11 Sr. ASIC Design Engineer (Timing Verification & Signoff) Hillsboro, OR

full chip timing methodology and guide timing convergence aspects for ASIC design ... Experience in timing and power signoff methodology development, timing corners/modes defin... more

Sep 11 ASIC/ Layout Design Engineer 2 AMD Sunnyvale, CA

of Application-Specific Integrated Circuits (ASIC) development from definition, ... and test. Must have knowledge of ASIC flows and tools. Requires knowledge and... more

Sep 11 Principal Engineer - ASIC Functional Safety Manager TRW Farmington, MI

# Job Description **Principal Product Engineer ASIC** **Product Overview:** Cognitive ... **Job Summary:** The **ASIC Functional Safety Engineer** position in... more

Sep 11 ASIC RTL Design Engineer Encore Semi San Diego, CA

ASIC RTL Design Engineer Location: San Diego, CA Contractor: 1099/Corp-to-Corp Project Dur ... synthesis, simulation, and timing tools. • Use of third party IP cores including... more

Sep 09 FPGA/ASIC Engineer Toshiba Medical Research Institute USA Vernon Hills, IL

is looking for an experienced engineer to join the FPGA / ASIC development team ... The Senior Engineer will be responsible for development and verification of FPGA / ASIC de... more

Sep 09 ASIC verification Engineer Qsolv San Jose, CA

Job Title ASIC verification engineer Position Full Time Location San ... generation, register automation SoC ASIC verification, Perl, Tcl, DDR, eDRAM,... more

Sep 09 Full-time ASIC Verification Technical Link Atlanta, GA

oral communication skills. Ability to clearly document plans. 61472Ability to interface with different teams and prioritize work based on project needs. ASIC Verification, OVM,... more

Sep 08 Intern - ASIC Design Engineer Infinera Sunnyvale, CA

Write scripts to automate some tasks of the ASIC design/verification process ... Work on creating & cleaning up timing constraints.</li><li>Create tools au... more

Sep 06 Principal ASIC Design Engineer Broadcom Irvine, CA

Job Posting Title Principal ASIC Design Engineer Business Unit Infrastructure and ... high performance communications/networking ASIC products. Experience in mapping... more

Sep 05 Intern – ASIC HW Engineer InterDigital King of Prussia, PA

block diagrams, flow diagrams, and timing diagrams. · Writing VHDL or Verilog RTL ... - Electrical Engineering experience: Verilog/VHDL, cycle accurate simulations, FPGA/ASIC s... more

Sep 03 Real-time Software Engineer Lincoln Laboratory, Massachusetts Institute of Technology Massachusetts

Group seeks a lead software development engineer capable of a performing a key role in our major Mission Systems programs where individual avionics subsystems will be... more

Aug 23 Sr ASIC Design Engineer (Circuit Integration) Job Intel Beaverton, OR

integration and ASIC implementation and timing signoff methodology of high frequency, ... ASIC EDA tools like Synthesis, P&R and Timing including timing constraints... more

Aug 22 Timing Methodology Engineer Altera San Jose, CA

As a Timing Methodology Engineer, you will be developing and executing full-chip static ... good understanding of standard ASIC timing formats such as Liberty, SPEF,... more

Aug 21 Senior ASIC Verification Engr Job SanDisk Salt Lake City, UT

•Have 5-9 years of industry experience with successfully completed ASIC/FPGA verification ... Lake City Job Segments: Engineer, Electrical, Instrumentation, Unix, Testing, Engineering,... more

Aug 21 ASIC Physical Design Engineer Juniper Networks Sunnyvale, CA

We are looking for a Physical Design engineer to work on massive, high-performance ... the challenges of full-chip routing, timing, integration, assembly, and physical... more

Aug 21 ASIC Design Engineer Job Micron Milpitas, CA

Req ID: 18149 As an ASIC Design Engineer at Micron Technology, Inc., your role will be ... in using synthesis, simulation, static timing analysis, power analysis (plus). -... more

Aug 21 ASIC Principal Product Engineer-Automotive KP Recruiting Group Farmington Hills, MI

Description : Principal Product Engineer - ASIC Product Overview: Cognitive Safety ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Aug 19 ASIC/ Layout Design Engineer 2 Amd | Seamicro Sunnyvale, CA

of Application-Specific Integrated Circuits (ASIC) development from definition, ... and test. Must have knowledge of ASIC flows and tools. Requires knowledge and... more

Aug 15 Lead ASIC Design Engineer Viasat Cleveland, OH

hierarchically partitioned layout, ASIC developments * Experience with advanced ... you. In this role as the Lead ASIC Design Engineer you will work in a multidisciplinary... more

Aug 15 Digital ASIC Electrical Electrical Engineer HP Vancouver, WA

are an experienced Digital ASICs Electrical Engineer, please read on! What You will be Doing As a Digital ASICs Electrical Engineer, you will join a highly capable project team... more

Aug 13 ASIC Physical Designers Synergy Seven Austin, TX

verification including formal equivalence, timing, electrical rules, DRC/LVS, Noise, and electro-migration checks. - Primetime, PTSI, Conformal LEC, RedHawk, Tavor/Airstream,... more

Aug 11 Senior Product Engineer - ASIC Design TRW Automotive Holdings Farmington Hills, MI

5 + years of mixed signal ASIC development/design and/or automotive electronic design expe ... and verification/validation of ASIC design desired. Additional Information: Direct... more

Aug 07 Sr. ASIC RTL Design Engineer Consultant Real Staffing Sunnyvale, CA

Participate in synthesis, timing/power closure and FPGA/silicon bring-up ... Experience with ASIC design verification, synthesis, timing/power analysis and DFT... more

Aug 07 MTS ASIC Design Engineer Cameron Resources Group Orlando, FL

an ASIC Design Engineer, you will: Develop ASIC architecture and micro-architecture ... test cases, and test benches Synthesis and Timing methodology Develop code for embedded... more

Aug 04 ASIC Designer - Mixed Signal/Analog Volt Workforce Solutions Bellevue, WA

Requirements In order to qualify, ASIC Designer - Mixed Signal/Analog should ... devices * Bachelor's degree in Electrical Engineer or related field * Various... more

Aug 04 Sr ASIC Design Engineer (Circuit Integration) Intel Hillsboro, OR

integration and ASIC implementation and timing signoff methodology of high frequency, ... ASIC EDA tools like Synthesis, P&R and Timing including timing constraints... more

Jul 28 ASIC Design Engineer (JOB ID : 11871) HCL Technologies Hillsboro, OR

skills: * ASIC Design Engineer for ... Tools, Scripting languages * ASIC Verification Engineers - Digital Design, Static Timing Analysis, Logic Equivalence Verification,... more

Jul 23 Engineering Technician CM Level II - Full Time American Engineering Testing Rapid City, SD

10. Communicate with client, contractor and engineer OTHER REQUIREMENTS 1. Ability to ... standards of industry including ASTM, ASIC, and ACT as well as state laws governing... more

Jul 22 ASIC digital design engineer Huntech Consultants San Jose, CA

el test benches. Candidate will assist in synthesis and gate-level simulation tasks related to your module and will assist in verification and timing of the entire chip. more

Jul 17 ASIC Digital Design Engineer APN Software Services San Jose, CA

module and will assist in verification and timing of the entire chip. Job Description: ... accessible to all. Qualcomm Atheros' digital ASIC design teams deliver cutting edge... more

Jul 08 ASIC Design Engineer Amd | Seamicro Orlando, FL

assistance to resolve synthesis and timing analysis issues. + Working with ... Must have 6 years of experience in RTL level ASIC design, including use of a source... more

Jun 16 ASIC RTL Design Engineer Google Mountain View, CA

checks. * Participate in synthesis, timing/power closure and FPGA/silicon ... with ASIC design verification, synthesis, timing/power analysis and DFT. Preferred... more

Jun 03 ASIC Design Engineer AMD Orlando, FL

ASIC Design Engineer AMD (NYSE: AMD) a semiconductor design innovator who pioneers ... assistance to resolve synthesis and timing analysis issues. Position... more

Jun 02 Bell Labs - High Speed ASIC Design Researcher - 214 Alcatel-lucent Murray Hill, KY

degree in Electrical Engineering or Master degree with &gt;1 year of ASIC design/layout experience. · Strong hands-on experience and publications in the design, layout... more

May 31 Engineer, Senior ASIC Design Results Center Longmont, CO

integration, design-for-test (DFT), Static Timing Analysis (STA), and Simulations. DFT and STA Experience required. Experience with Primetme, DC required. Must be familiar with... more

May 31 Engineer, ASIC Design Verification Results Center Santa Clara, CA

Develop SOC verification tests for HDD using C, System Verilog in Unix environments. Need to understand real time SOC concepts and programming. Knowledge about industrial standard... more

May 30 Engineer, Senior ASIC Design Marvell Longmont, CO

integration, design-for-test (DFT), Static Timing Analysis (STA), and Simulations. DFT and STA Experience required. Experience with Primetme, DC required. Must be familiar with... more

May 30 Engineer, ASIC Design Verification Marvell Santa Clara, CA

Develop SOC verification tests for HDD using C, System Verilog in Unix environments. Need to understand real time SOC concepts and programming. Knowledge about industrial standard... more

May 15 ASIC Design Engineers (AMRD) Fortinet Sunnyvale, CA

be considered for all of our ASIC Design Engineer openings for all teams. Job * ... Perform ASIC verification, synthesis, and timing analysis IP integration *... more

Apr 28 SOC/ASIC Verification Compnova Austin, TX

Full time Description: The Verification Engineer will be responsible for developing ... Skills/Experience: - 3+ years of experience in ASIC/SoC Verification - Strong knowledge in... more

Apr 28 ASIC Engineer American Cybersystems San Jose, CA

RoleASIC EngineerMandatory Technical Skills- Asic code to FPGA code conversion (porting)- ... implementation (synthesis,packing,Timing closure)- Verification of the FPGA... more

Apr 27 Digital Electronics, Digital ASIC, and MMIC Design Engineers(13014114) Northrop Grumman Baltimore, MD

Digital ASIC Design, and MMIC Design. Our ASIC Design Engineers are involved in the ... experience in SiGe technologies, a plus. ASIC positions require a Top Secret... more

Mar 12 ASIC Design Engineer Sustainable Recruitment Concepts Irvine, CA

ASIC Design Engineer Orange County Hardware Imaging Company is actively seeking a smart ... behavioral and gate level simulations, timing, power analysis and closure, gate... more

Mar 10 Sr. Engineer, ASIC Design/Verification Sustainable Recruitment Concepts San Jose, CA

Engineer, ASIC Design/Verification RESPONSIBILITIES ASIC implementation of H.265/HEVC vide ... c-modeling, firmware integration Synthesis, Timing and Formal REQUIREMENTS BS/MS/PHD in... more

Feb 06 Engineer, ASIC Design Marvell Technology Group Boise, ID

hierarchical partitioning. Hierarchical and timing driven place &amp; route. Parasitic extraction and static timing analysis. Power and noise analysis, clock tree analysis, signal... more

Feb 06 ASIC Design Engineer Altera San Jose, CA

for activities covering the whole ASIC frontend flow, which includes developing ... interfacing with backend team on STA, timing closure and P&R, and participating in... more

Sep 24 Digital Electronics, Digital ASIC, and MMIC Design Engineers Northrop Grumman Baltimore, MD

Digital ASIC Design, and MMIC Design. Our ASIC Design Engineers are involved in the ... routing, clock tree synthesis, static timing analysis and LVS/DRC steps required to... more

Jun 05 Engineer, ASIC Design Verification Marvell Technology Group Santa Clara, CA

Develop SOC verification tests for HDD using C, System Verilog in Unix environments. Need to understand real time SOC concepts and programming. Knowledge about industrial standard... more

Mar 23 ASIC Design Engineers, FPGA, Communications. 6-month contract Accurit Staffing Downingtown, PA

Experience synthesizing and closing timing of designs is of great importance. ... the product in development. Contract Design Engineer Sunnyvale, CA 94086 My client... more

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