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Nov 25 ASIC Design Engineer Job Yoh Irvine, CA

- Timing Analysis What You'll Be Doing: - ASIC Design Engineer will be responsible ... analysis, FEV and layout verification. - ASIC Design Engineer will also collaborate... more

Nov 22 Integrated Circuit Design Engineer Job Yoh Chandler, AZ

Cadence Encounter ASIC toolset. - IC Design Engineer will interface with cross-functional ... - Expertise in ASIC flows including synthesis, auto-place-and-route, static timing analysi... more

Nov 19 Verification Engineer Aerotek Phoenix, AZ

Job Description: The ideal candidate with have a degree in Electrical or Computer Engineer ... * Previous experience with some stage of a specific vendors design tools for ASIC/FPGA dev... more

Nov 19 ASIC Design Manager Ee-recruiters Santa Clara, CA

lives of our candidates. Job Description: ASIC Design Manager We are looking for ... Engineering - a must * MS in EE is a plus ASIC, Foundry, RTL, DFT, Place, Route, Floor,... more

Nov 13 ASIC Engineer with Security Clearance Raytheon El Segundo, CA

schedule development, architecture design, ASIC specification, HDL (Hardware Description ... Architecture definition, ASIC/FPGA specification... more

Nov 13 Senior Product Engineer - ASIC Design Global Safety Products Company Farmington Hills, MI

of Application Specific Integrated Circuits (ASIC) and Application Specific Standard ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Nov 12 Electrical Design Engineer - Hardware Design / Microcontroller / Altium Randstad Engineering Mankato, MN

installation engineer, electrical field engineer, electrical design engineer, ... engineer, mechanical engineer, development engineer, electro-mechanical engineer,... more

Nov 11 Senior ASIC/FPGA Verification Engineer Firstpass Engineering Phoenix, AZ

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... www.firstpasseng.com Job Description: Senior ASIC/FPGA Verification Engineer The ideal... more

Nov 11 ASIC/FPGA Design Engineer Firstpass Engineering Denver, CO

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... Find out more at www.firstpasseng.com Job Description: ASIC/FPGA Design Engineer The ideal... more

Nov 11 ASIC/FPGA Design Verification Engineer Firstpass Engineering Denver, CO

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... Find out more at www.firstpasseng.com Job Description: ASIC/FPGA Verification Engineer The... more

Nov 11 Senior ASIC/FPGA Design Engineer Firstpass Engineering Phoenix, AZ

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... Find out more at www.firstpasseng.com Job Description: Senior FPGA/ASIC Design Engineer Th... more

Nov 03 ASIC RTL EDI TCL Engineer: CAD IV- ITEKJP00003885 Collaborative Vision Chandler, AZ

flow development for the Cadence Encounter ASIC toolset. Qualifications: Experience ... Experience with ASIC flows including synthesis, auto-place-and-route, static timing analys... more

Nov 01 Design Automation Engineer: CAD/ASIC/EDI Everest Consultants Chandler, AZ

e are looking for a senior Design Automation Engineer with ASIC, EDI and Cadence ... engineer with an MSEE with 8 years of experience. ASIC, DESIGN, AUTOMATION, CADENCE,... more

Oct 31 Lead Business Analyst, Principal - IT / ASIC, EDA A New Beginning-genesis 2 Santa Clara, CA

An understanding of ASIC design engineering tools and methods a plus. Proven ability ... of ASIC development lifecycle, EDA tools, and experience with Integrated Circuit... more

Oct 30 Principal Product ASIC Air Bag Safety Engineer TRW Automotive Farmington Hills, MI

AIRBAG ASIC ENGINEER Product Overview: Cognitive Safety Systems’ remarkable power to help ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Oct 30 ASIC Place and Route Design Engineer Tekpartners, A P2p Company Chandler, AZ

Job Description: Position: ASIC Place and Route Design Engineer ... Need experience with ASIC flows including synthesis, auto-place-and-route, static timing a... more

Oct 28 Senior ASIC Verification Engineer with Security Clearance 2020itservices Fort George G Meade, MD

ASIC Verification Engineer Must be actively cleared to TS/SCI with a fullscope polygraph E ... preferred. Requirements: Five plus years ASIC Verification Experience Strong Logic... more

Oct 07 ASIC/FPGA Design Engineer with Security Clearance 2020itservices Fort George G Meade, MD

ASIC/FPGA Design Engineer Clearance Required: An active TS/SCI clearance with fullscope/li ... Expert level experience with Synopsys and/or Cadence tools for synthesis, static timing an... more

Aug 08 ASIC Design Engineer NVIDIA Santa Clara, CA

ASICs, RTL design and synthesis, Logic and Timing verification using leading edge CAD tools and Semiconductor process technologies5 Currently enrolled in BSEE, MSEE or PhD... more

More Job Postings from the Web
Nov 25 ASIC Design Engineer Job Micron Milpitas, CA

Req ID: 15367 As an ASIC Design Engineer at Micron Technology, Inc., your role will be ... in using synthesis, simulation, static timing analysis, power analysis (plus). -... more

Nov 25 Embedded Systems Engineer Nintendo of America Redmond, WA

of FPGA/ASIC design, 8, 16, and 32 bit embedded microcontrollers, or Soft Processors, firmware design, and implementation * Ability to develop and evaluate products * Strong... more

Nov 25 Junior FPGA Engineer Next Step Systems Chicago, IL

Engineering -1-2 years of experience in FPGA/ASIC Design -Strong understanding of software ... etc.) Chicago IL Jobs, FPGA Engineering, ASIC Design, Scripting, Linux, Illinois... more

Nov 24 Senior ASIC Verification Engineer Results Center Santa Clara, CA

*MS in EE/CS with 2-5 years of experience *experience in design/verification of complex networking protocols. preferrably wireless networking *experience of building verification... more

Nov 24 Sr. Digital IC Design Engineers Kforce Inc. Phoenix, AZ

A growing semiconductor company in the Phoenix, Arizona (AZ) metropolitan area (East Valley) is looking for Sr. Digital Design Engineers to be a part of a strong digital/mixed... more

Nov 24 ASIC Design Engineer (RTL/SSD/FiberChannel) Ethan Alexander Group Milpitas, CA

ASIC Design Engineer Responsibilities ·Be a part of ASIC development team for enterprise ... production testing. ·Support system engineer in protocol compliance tests. more

Nov 24 Senior ASIC Verification Engineer Marvell Technology Group Santa Clara, CA

*will be involved in developing verification strategy, test plan and verification enviornment geared towards verifying complex networking protocol *will lead and own several... more

Nov 24 FPGA/ASIC Design Engineer Biztech Fort Lauderdale, FL

client we are looking for a FPGAASIC Design Engineer. The client offers progressive work ... are encourage to apply. FPGAASIC Design Engineer Full-Time Position Essential Duties... more

Nov 24 ASIC Implementation Methodology Lead Cyreq San Jose, CA

Needs to be familiar with all aspects of ASIC integration including Floorplanning, ... design approach, top-down design, budgeting, timing and physical convergence. Must have... more

Nov 23 ASIC Design Engineer - Timing Lead Ee Recruiters Santa Clara, CA

requirements for a Design Engineers with Timing Closure experience. Please go through ... extensiveexperience in owning and developing timing constraints for complex multi-clock... more

Nov 23 ASIC Principal Product Engineer-Automotive KP Recruiting Group Farmington Hills, MI

Principal Product Engineer - ASIC Product Overview: Cognitive Safety Systems’ remarkable ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Nov 21 Physical Design Application Engineering Manager Cadence Design Systems San Diego, CA

synthesis, in place optimization, routing, timing analysis/closure and ECO tasks (timing, ... extraction, EM/IR Drop Analysis, timing and Signal Integrity closure, physical... more

Nov 21 Electronic Design Automation (EDA) - Digital ASIC Design (San Diego, Santa Clara) QUALCOMM San Diego, CA

Design Automation Engineer - Digital ASIC Design (San Diego): * Job Function: * ... * Some knowledge in general ASIC design language and data formats like Verilog/VHDL, IPXAC... more

Nov 21 Technical Solutions Engineer IBM Essex Junction, VT

Specific Integrated Circuit (ASIC) customers. Specifically, we are seeking ... client requirements into an existing ASIC Design For Test (DFT) methodology and... more

Nov 20 Hardware Design Engineer, CLC Level 0, TS SCI w/POLY REQ'D General Dynamics Information Technology Fort Meade, MD

Hardware Design Engineer, CLC Level 0, TS SCI w/POLY REQ'D in Ft Meade, Maryland As a trus ... as Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array... more

Nov 20 Principal SW Development Engineer - Broadcom ethernet switches Aviat Networks Santa Clara, CA

need for a Principal SW Development Engineer with strong Broadcom switches ... * Design, implement, modify and validate ASIC specific Hardware Abstraction Layers and... more

Nov 20 Engineer, ASIC Design Marvell Santa Clara, CA

Familiar with Synopsys synthesis and static Timing analysis tools. Capable of ... - Support software team or application engineer on issue investigation and debugging... more

Nov 19 Engineer, ASIC Design Results Center Santa Clara, CA

Familiar with Synopsys synthesis and static Timing analysis tools. Capable of ... - Support software team or application engineer on issue investigation and debugging... more

Nov 19 Hardware Reverse Engineering National Security Agency (NSA) Fort George G Meade, MD

to work as a Hardware/Software Analysis Engineer to perform vulnerability discovery ... Network Analysis -Experience using VHDL in ASIC and/or FPGA design Training: On-the job... more

Nov 18 Technical Specialist- ASIC Functional Safety Engineer KP Recruiting Group Farmington Hills, MI

Job Description : The ASIC Functional Safety Engineer position in Global Electronics ... safety,Experience with standard ISO 26262,Experience in mixed signal ASIC... more

Nov 18 Design Engineering DirectorUnited States Thermo Fisher Scientific South San Francisco, CA

CIS * Hands-on experience in RTL design, timing closure, verification system ... design integration engineers on static timing analysis, power, and logic checks *... more

Nov 17 ASIC Digital Design Engineer 3coast Pasadena, CA

US Citizens. Position: ASIC Digital Design Engineer Location: Pasadena, CA Compensation: ... eDA tools, e.g. simulation, synthesis, PAR, timing analysis. Excellent verbal and written... more

Nov 15 ASIC Designer 3 - CAD Tools Development Engineer(14020012) Northrop Grumman Baltimore, MD

characterization, RTL synthesis, and static timing analysis. He/she will collaborate with ... level simulation (Mentor Questa), static timing analysis (Synopsys Primetime), logic... more

Nov 15 ASIC Designer 5 - CAD Tools Development Engineer(14019319) Northrop Grumman Baltimore, MD

The Electronics Engineers/CAD Developers will be responsible for ASIC digital design flow ... level simulation (Mentor Questa), static timing analysis (Synopsys Primetime), logic... more

Nov 15 Engineer, Senior Staff ASIC Design Marvell Longmont, CO

integration, design-for-test (DFT), Static Timing Analysis (STA), and Simulations. DFT and STA Experience required. Experience with Primetme, DC required. Must be familiar with... more

Nov 13 Sr. ASIC Design Engineer (7 years exp. min.) Real Staffing Sunnyvale, CA

Our client is looking for a Sr. ASIC Design Engineer with the following skills: Developing ... Synthesize and optimize RTL for timing, area and power. Developing front-end... more

Nov 13 Senior or Lead Engineer - ASIC Physical Design Ericsson San Jose, CA

Req ID: 23950 Tech Lead Engineer - ASIC Physical Design Smart Services Router San Jose, ... routing, implementation (using Verilog), timing closure, synthesis of complex ASICs. Must... more

Nov 13 Internship: ASIC Engineering Job SanDisk Salt Lake City, UT

Description: SanDisk is seeking a talented ASIC/FPGA Intern in Salt Lake City, UT for our ... As an Intern, the Logic Engineer will be involved in a variety of ASIC/FPGA development ta... more

Nov 12 Engineering Program Manager, ASIC Apple Santa Clara, CA

* Job Number: 36363568 * Address: Santa Clara Valley, California, United States * Posted: Nov. 12, 2014 * Category: Corporate * Job Summary: As a Program Manager for Apple SoC... more

Nov 10 ASIC Engineer 3 Juniper Networks Sunnyvale, CA

Job Details Position: Asic Physical Design Engineer for Clock, Power and Related Circuits ... and on-chip variation specs * Run timing using Hspice and Static Timing... more

Nov 09 Sr Staff ASIC Design Engineer Broadcom Santa Clara, CA

ID** 33073BR **Job Posting Title** Sr Staff ASIC Design Engineer **Business Unit** ... ID:* 33073BR *Title:* Sr Staff ASIC Design Engineer *Date:* Fri, 07 11 2014 00:00:00 GMT... more

Nov 07 Senior ASIC/SOC Design Engineer Evo Portland, OR

Evo s Hillsboro client is searching for a Senior ASIC/SOC Design for a 6 month contract ro ... 5 years of experience in VLSI design or ASIC/SOC design experiences including... more

Nov 07 Senior ASIC/SOC Design Engineer (4148) Randstad Technologies Hillsboro, OR

clock tree synthesis (CTS), APR, static timing analysis, ERC, DRCLVS, RV, Noise ... any other legally protected group status. Analysis, ASIC, CAD, Circuit, Genetic, Perl,... more

Nov 07 Senior ASIC/SOC Design Engineer eTech Resources Hillsboro, OR

Component Design Engineer 7998/4148 Hillsboro, OR 6-18 month contract Education: Must have ... 5 years of experience in VLSI design or ASIC/SOC design experiences including... more

Nov 07 ASIC Design Engineer Broadcom Irvine, CA

32898BR **Job Posting Title** ASIC Design Engineer* **Business Unit** Broadband and ... Location(s)** N/A *Req ID:* 32898BR *Title:* ASIC Design Engineer* *Date:* Tue, 04 11 2014... more

Nov 06 Electrical Engineering Intern (Summer 2015) - ASIC FPGA Rockwell Collins Cedar Rapids, IA

military communications products. Electrical Engineer - Summer 2015 Intern- ASICFPGA This ... to provide support to the Government Systems ASIC Design Center. This position will... more

Nov 06 FPGA/ASIC Engineer Toshiba Medical Research Institute USA Vernon Hills, IL

is looking for an experienced engineer to join the FPGA / ASIC development team ... The Senior Engineer will be responsible for development and verification of FPGA / ASIC de... more

Nov 05 ASIC Design Engineer Yoh Irvine, CA

Design Timing Analysis What You'll Be Doing: ASIC Design Engineer will be responsible ... analysis, FEV and layout verification. ASIC Design Engineer will also collaborate... more

Nov 05 Design Automation Engineer - ASIC Evo Phoenix, AZ

flow development for the Cadence Encounter ASIC toolset. REQUIRED: Experience using the ... synthesis Auto-place-and-route, static timing analysis Physical verification... more

Nov 05 ASIC Physical Designers - IV Experis Newport Beach, CA

FOR REVIEW 10948158 ITEKJP00003864 ASIC Physical Designers IV 8 Month Contract ... Skills Verilog RTL skills Synthesis and Timing analysis experience Synopsys ICC DFT... more

Nov 04 Technical Specialist- Asic Functional Safety Engineer Gbs4u Farmington Hills, MI

our direct client The ASIC Functional Safety Engineer position in TRW Global Electronics ... safetyExperience with standard ISO 26262Experience in mixed signal ASIC... more

Nov 04 Synopsys Validation EngineerASIC, RTL Mavensoft Technologies Irvine, CA

looking for Synopsys Validation EngineerASIC, RTL for 4Months contractor position. If ... your time. Job Title: Synopsys Validation EngineerASIC, RTL Location: Irvine, CA... more

Nov 03 ASIC Physical Design Engineer Mindteck Hillsboro, OR

contributions you will make as the next ASIC Physical Design Engineer to join our ... the way. Apply Today! ASIC Physical Design Engineer Summary: Experience in 14nm design... more

Nov 02 ASIC Design Engineer (JOB ID : 11871) HCL Technologies Hillsboro, OR

Others Designation: Database Architect/ Designer Desired skills: * ASIC Design Engineer fo ... Tools, Scripting languages * ASIC Verification Engineers - Digital Design, Static Timing... more

Nov 01 Timing Engineer Artech Information Systems Cary, NC

engineers to analyze timing results, write timing ECOs to close design timing ... experience with Static Timing Analysis, timing constraints debug, and timing... more

Oct 30 ASIC Design Engineer Kelly Services Newport Beach, CA

fabrics.We are looking for several skilled ASIC designers all throughout the US for ... Performance Verification involving static timing analysis, FEV and layout... more

Oct 29 Electronics Engineer - Software Delphi Warren, OH

Product engineer responsible for performing Solid State Electrical Center development ... tasks and achieving technical goals and timing objectives. * Tasks include software... more

Oct 29 ASIC Design and Methodology Support Engineer with Security Clearance 2020itservices Fort George G Meade, MD

of EDA vendors, flows, and tools related to ASIC design including Cadence, Mentor, and ... using Synopsys tools Basic understanding of ASIC layout TS/SCI with fullscope or... more

Oct 29 ASIC DESIGN ENGINEER Synergy Seven Newport Beach, CA

team to debug the design. Required Skills: ASIC and SoC design experience, Physical ... Skills: Verilog RTL skills, Synthesis and Timing analysis experience, Synopsys ICC, DFT... more

Oct 28 Electrical Engineering Co-op Raytheon Tewksbury, MA

2015 EDD Co-op January-June If you are currently pursuing a degree in Electrical Engineering and/or Computer Engineering, here is your opportunity to pursue an exciting co-op... more

Oct 23 Staff Phy ASIC Engineer Commnexus San Diego, CA

Overview We are seeking a Modem ASIC Design Engineer to be an important team member in ... industrial experience in ASIC design Solid ASIC design experience including architecture... more

Oct 22 Principal ASIC Design Engineer (DSP Experience Required System-On- Chip Relocation Available) Kore1 Technologies Irvine, CA

opening for a Principal ASIC Design Engineer. Job Responsibilities: The Principal ... synthesis and supporting timing closure. • Experience with design tools such... more

Oct 21 ASIC Physical Design Architect Hitachi Global Storage Technologies Austin, TX

requirements. You will collaborate with ASIC designers and other engineering ... the timing, power and area targets for the ASIC. Your contributions will have an immediate... more

Oct 20 ASIC Staff Engineer Seagate Indianapolis, IN

design, verification and documentation for ASIC development. Typical duties: Determines ... work with verification and firmware engineer. Good communication. 5. Experience... more

Oct 20 SR. PHYSICAL DESIGN / TIMING ENGINEER NVIDIA Santa Clara, CA

PHYSICAL DESIGN / TIMING ENGINEER #1752453 DESCRIPTIONS / - BS in Electrical or Computer ... timing constraints generation, physical/timing convergence, and ECO... more

Oct 13 ASIC Physical Design Lead Engineer Avago Technologies Indiana

be required to do equivalence checks, STA, Timing Si and noise closure, power ... have experience formal verification and timing analysis and Eco implementation. more

Oct 08 Timing Engineer APN Software Services Raleigh, NC

experience with Static Timing Analysis, timing constraints debug, and timing ... engineers to analyze timing results, write timing ECOs to close design timing... more

Oct 08 Sr. ASIC Design Engineer (Timing Verification & Signoff) Intel Arizona

full chip timing methodology and guide timing convergence aspects for ASIC design ... Experience in timing and power signoff methodology development, timing corners/modes defin... more

Oct 07 Verification Engineer - ASIC Fusion408 Raleigh, NC

multimillion gate ASICs. The Verification Engineer will be responsible for a wide ... work on cutting-edge technology within the ASIC design industry * Competitive salary *... more

Oct 06 Senior ASIC Design Engineer - Cache System Apple Santa Clara, CA

* The ideal candidate will have 5+ years of ASIC design experience, * 5+ years of ... Work with physical design team to close timing of the same. * Education:... more

Sep 23 Principle Engineer 0 Airbag Safety ASIC Design Conexess Group Livonia, MI

5 + years of mixed signal ASIC development/design and/or automotive electronic design expe ... or Verilog and verification/validation of ASIC design desired. Additional... more

Sep 11 BDS Electrical Engineering Intern (multiple locations) Boeing Albuquerque, NM

equivalent to that of an entry-level engineer in the Electronics & Electrical ... these systems is designed at the circuit, ASIC, FPGA, MMIC and 3D electromagnetics... more

Sep 11 Sr. ASIC Design Engineer (Timing Verification & Signoff) Hillsboro, OR

full chip timing methodology and guide timing convergence aspects for ASIC design ... Experience in timing and power signoff methodology development, timing corners/modes defin... more

Sep 11 ASIC/ Layout Design Engineer 2 AMD Sunnyvale, CA

of Application-Specific Integrated Circuits (ASIC) development from definition, ... and test. Must have knowledge of ASIC flows and tools. Requires knowledge and... more

Sep 08 Intern - ASIC Design Engineer Infinera Sunnyvale, CA

Work would involve participation in ASIC design; development of minor modules, creating ... Write scripts to automate some tasks of the ASIC design/verification process... more

Aug 21 Senior Synthesis/Timing Engineer" Job Intel Irvine, CA

Senior Synthesis/Timing Engineer" - 735403 Description Responsibilities: - In this role, t ... requires thorough knowledge of the ASIC design synthesis and timing closure flow... more

Aug 19 ASIC/ Layout Design Engineer 2 Amd | Seamicro Sunnyvale, CA

of Application-Specific Integrated Circuits (ASIC) development from definition, ... Requires demonstrated technical expertise in ASIC design and/or verification including -... more

Aug 15 Digital ASIC Electrical Electrical Engineer HP Vancouver, WA

are an experienced Digital ASICs Electrical Engineer, please read on! What You will be Doing As a Digital ASICs Electrical Engineer, you will join a highly capable project team... more

Aug 14 Hardware Design Verification Engineer - NOT ASIC Enphase Energy Petaluma, CA

seeking a Hardware Design Verification Engineer specializing in product testing for compliance and homologation to international standards. This important role supports the... more

Aug 11 Timing Engineer Randstad Technologies - New Raleigh, NC

engineers to analyze timing results, write timing ECOs to close design timing ... experience with Static Timing Analysis, timing constraints debug, and timing... more

Aug 07 MTS ASIC Design Engineer Cameron Resources Group Orlando, FL

an ASIC Design Engineer, you will: Develop ASIC architecture and micro-architecture ... test cases, and test benches Synthesis and Timing methodology Develop code for embedded... more

Jul 23 Engineering Technician CM Level II - Full Time American Engineering Testing Rapid City, SD

10. Communicate with client, contractor and engineer OTHER REQUIREMENTS 1. Ability to ... standards of industry including ASTM, ASIC, and ACT as well as state laws governing... more

Jul 11 Sr. ASIC Engineer Real Staffing Sunnyvale, CA

Job description Sr. ASIC Design Engineer Our client is looking for Senior Design Engineer ... Perform ASIC verification, synthesis, and timing analysis IP integration... more

Jul 11 Senior ASIC/SOC Design Engineer Experis Hillsboro, OR

10951374/ITEKJP00004148 Senior ASIC/SOC Design Engineer Hilsboro, OR 6 months contract Our ... chip makers is looking for a Senior ASIC/SOC Design Engineer for their Portland,... more

Jun 16 ASIC RTL Design Engineer Google Mountain View, CA

* Participate in synthesis, timing/power closure and FPGA/silicon bring-up ... * Experience with ASIC design verification, synthesis, timing/power analysis and DFT... more

Jun 02 Bell Labs - High Speed ASIC Design Researcher - 214 Alcatel-lucent Murray Hill, KY

degree in Electrical Engineering or Master degree with >1 year of ASIC design/layout experience. · Strong hands-on experience and publications in the design, layout and testing of... more

May 15 ASIC Design Engineers (AMRD) Fortinet Sunnyvale, CA

apply, you will be considered for all of our ASIC Design Engineer openings for all teams. ... to RTL implementation * Perform ASIC verification, synthesis, and timing... more

May 12 IP Solutions Design Engineer Xilinx San Jose, CA

in the position of IP Solutions Design Engineer for wired and wireless networking ... and simulation * Extensive experience in timing optimization techniques for high-speed... more

Mar 10 Sr. Engineer, ASIC Design/Verification Sustainable Recruitment Concepts San Jose, CA

Engineer, ASIC Design/Verification RESPONSIBILITIES ASIC implementation of H.265/HEVC vide ... c-modeling, firmware integration Synthesis, Timing and Formal REQUIREMENTS BS/MS/PHD in... more

Feb 06 ASIC Design Engineer Altera San Jose, CA

for activities covering the whole ASIC frontend flow, which includes developing ... and optimizing the design for better timing, area and power, inserting DFT scan... more

Jan 07 ASIC Design Engineer Cross Creek Systems Santa Clara, CA

We are looking for ASIC Design Engineers with a BSEE/MSEE and at least 7-10 years of exper ... work with the physical design team to close timing and area goals. Requirements: BSEE... more

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