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Oct 19 Pre-Sales Engineer (ASIC / IP / Packaging) Semiconductor Solutions eSilicon San Jose, CA

in ASIC Physical design: Timing analysis using Static Timing Analysis '(STA); ... and implementation; Timing closure; Timing Signoff Methodology; Low power techniques... more

Oct 17 ASIC Design Manager Ee-recruiters Santa Clara, CA

lives of our candidates. Job Description: ASIC Design Manager We are looking for ... Engineering - a must * MS in EE is a plus ASIC, Foundry, RTL, DFT, Place, Route, Floor,... more

Oct 14 Digital Electronics - Digital ASIC and FPGA Design with Security Clearance Northrop Grumman Baltimore, MD

Digital ASIC Design, and FPGA Design. Our ASIC Design Engineers are involved in the ... routing, clock tree synthesis, static timing analysis and LVS/DRC steps required to... more

Oct 14 Sr. ASIC Design and Verification CAE Recruiters Lowell, MA

Broadly experienced Digital Design Engineer to architect, design and verify ... RTL design, verification, synthesis and timing analysis. Candidate will be expected... more

Oct 12 ASIC/FPGA Design Engineer Firstpass Engineering Phoenix, AZ

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... Find out more at www.firstpasseng.com Job Description: ASIC/FPGA Design Engineer The ideal... more

Oct 12 Senior ASIC/FPGA Design Engineer Firstpass Engineering Denver, CO

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... Find out more at www.firstpasseng.com Job Description: Senior FPGA/ASIC Design Engineer Th... more

Oct 12 Senior ASIC/FPGA Verification Engineer Firstpass Engineering Phoenix, AZ

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... www.firstpasseng.com Job Description: Senior ASIC/FPGA Verification Engineer The ideal... more

Oct 12 ASIC Designers (Staff, Sr Staff, Principal, Sr. Mgr, or Architects) SK Hynix Memory Solutions San Jose, CA

smartphones and tablets Job Description: ASIC Designers (Senior Staff/Principle)– 1-2 ... logic design and verification, timing closure, test vector generation, DMA,... more

Oct 12 ASIC/FPGA Design Verification Engineer Firstpass Engineering Denver, CO

Whether it be designing in the latest ASIC/FPGA technology or utilizing the most advanced ... Find out more at www.firstpasseng.com Job Description: ASIC/FPGA Verification Engineer The... more

Oct 09 Electrical Design and Analysis Engineer 5 Boeing Huntington Beach, CA

Senior Design Engineer responsible for leading and performing design and test of high performance analog integrated circuits reporting to the BR&T (Boeing Research & Technology)... more

Oct 07 ASIC/FPGA Design Engineer with Security Clearance 2020itservices Fort George G Meade, MD

ASIC/FPGA Design Engineer Clearance Required: An active TS/SCI clearance with fullscope/li ... Expert level experience with Synopsys and/or Cadence tools for synthesis, static timing an... more

Oct 01 ASIC Design Engineer Mindteck Santa Clara, CA

contributions you will make as the next ASIC Design Engineer to join our team in ... you along the way. Apply Today! ASIC Design Engineer Summary : CW will assist the DE... more

Oct 01 ASIC Designer - Mixed Signal/Analog Volt Workforce Solutions Bellevue, WA

In order to qualify for the role of ASIC Designer - Mixed Signal/Analog you should have: 5 ... devices Bachelor's degree in Electrical Engineer or related field Various... more

Sep 23 ASIC Engineer SEAKR Engineering Centennial, CO

ASIC Engineer   Centennial, CO Seeking an ASIC Engineer who will have an intimate ... techniques and procedures. The ASIC Engineer must be capable of identifying... more

Sep 15 Senior ASIC Engineer - DDR2/3 - RTL Cyient San Jose, CA

for block level as well as chip level, timing closure on DDR2/DDR3/PCIE etc., ... Compiler, RTL-Compiler Good knowledge in timing constraints Expertise in STA using... more

Aug 08 ASIC Design Engineer NVIDIA Santa Clara, CA

ASICs, RTL design and synthesis, Logic and Timing verification using leading edge CAD tools and Semiconductor process technologies5 Currently enrolled in BSEE, MSEE or PhD... more

More Job Postings from the Web
Oct 22 Reliability Engineer, Senior - Microsoft Devices Group - MSC (896909) Microsoft Bellevue, WA

We are currently looking for a creative and talented individual with a passion for technology to drive reliability and qualification of hardware products to meet and exceed our... more

Oct 22 Hardware Design Engineer, CLC Level 0, TS SCI w/POLY REQ'D General Dynamics Information Technology Fort Meade, MD

Hardware Design Engineer, CLC Level 0, TS SCI w/POLY REQ'D in Ft Meade, Maryland As a trus ... as Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array... more

Oct 22 Electronics Manufacturing Engineer Nationwide Technical & Executive Search Saxonburg, PA

Electronics Manufacturing Engineer Saxonburg, PAThis is high-technology company that ... and Responsibilities:The Manufacturing Engineer leads manufacturing in the... more

Oct 22 Digital Ic Design Engineer Career Development Partners Colorado Springs, CO

Digital Design and Verification Engineer. The ideal candidate has 5+ years of SoC / ASIC ... C, C++, C#, assembly, Perl, etc. • Driving synthesis, APAR, timing analysis, and ATPG... more

Oct 22 ASIC Design Solutions Engineer Intouch Staffing Professionals Santa Clara, CA

Timely, Cost Effective, and superior ASIC SOC Design Services. Your experience ... Customer Interaction. (marketing, PLM, Appl Engineer, etc.) All Applicants must be... more

Oct 22 FPGA Engineer/Developer, Verilog, Asic, SystemVerilog, Finance Hunter Bond Chicago, IL

FPGA Engineer, Verilog, Asic, SystemVerilog Prestigious Global Trading Firm is currently ... many of the following is advantageous: FPGA/ASIC Design Strong understanding of software... more

Oct 22 Principal ASIC Design Engineer Kore1 Technologies Irvine, CA

opening for a Principal ASIC Design Engineer. Job Responsibilities: The Principal ... synthesis and supporting timing closure. • Experience with design tools such... more

Oct 22 Senior Project Engineer 3coast Little Rock, AR

and US Citizens. Position: Senior Project Engineer Location: Little Rock, AR ... connectors, chip sockets, ASIC packaging, micro miniature connectors and sheet metal... more

Oct 22 Engineer, Senior ASIC Design Marvell Santa Clara, CA

synthesis, formal verification, static timing analysis, and silicon bring up. Candidate must be proficient in running tools and solving problems in 2 or more of the above... more

Oct 21 STAFF ELECTRONIC DESIGN ENGINEER Georgia Department of Labor Norcross, GA

DFT, ATPG; synthesis and timing closure; ASIC front-end flow scripts; Verilog HDL, ... Conduct ASIC front end flow set up and development, including synthesis, static timing ana... more

Oct 21 Senior Digital Design Engineer (ASIC/RTL design, synthesis, and timing closure) Encore Semi San Diego, CA

Senior Digital Design Engineer - Implementation Location: San Diego, California Skills / E ... development and validation, timing analysis, formal verification Education: BSEE... more

Oct 21 ASIC Engineer- Entry Level Seagate Longmont, CO

world. Seagate is looking for an Entry Level Engineer to join our Longmont System-on-Chip(SOC) team that integrates sub-blocks from Seagate design teams along withvendor logic to... more

Oct 21 ASIC Physical Design Architect Hitachi Global Storage Technologies Austin, TX

requirements. You will collaborate with ASIC designers and other engineering ... the timing, power and area targets for the ASIC. Your contributions will have an immediate... more

Oct 21 Jr. FPGA Engineer - FPGA ASIC Python Perl Linux Professional Manufacturing Services New York City, NY

1-2 years of experience in FPGA / ASIC Design Strong understanding of software and hardware interaction Knowledge of general purpose processors architecture and hardware/software... more

Oct 21 SR. PHYSICAL DESIGN / TIMING ENGINEER NVIDIA Santa Clara, CA

PHYSICAL DESIGN / TIMING ENGINEER Job ID 1752453 Location US, CA, Santa Clara Description ... PHYSICAL DESIGN / TIMING ENGINEER #1752453 DESCRIPTIONS / RESPONSIBILITIES: - Implementati... more

Oct 21 Design Engineering Director Science Careers South San Francisco, CA

with determining required timing constraint checks, block level models, ... design integration engineers on static timing analysis, power, and logic... more

Oct 21 Jr. FPGA Engineer Full Time Job in Chicago Professional Data Systems San Francisco, CA

ence of full development cycle of FPGA design Should be comfortable developing in a Linux environment 1-2 years of experience in FPGA / ASIC Design Strong understanding of... more

Oct 21 Senior Digital Design Engineer Department of Workforce Services Pocatello, ID

digital blocks in Mixed-Signal IC,simulation,timing-electrical ... timing constraints,static timing analysis,closing timing,ATPG,and... more

Oct 20 Mgr / Sr. Mgr, Software Engineering, Control Plane/Forwarding Brocade San Jose, CA

Mgr / Sr. Mgr, Software Engineering, Control Plane/Forwarding Requisition # If you're looking to energize your career, now is a great time to join Brocade. As a leading provider... more

Oct 20 Junior FPGA Engineer Next Step Systems Chicago, IL

Engineering -1-2 years of experience in FPGA/ASIC Design -Strong understanding of software ... etc.) Chicago IL Jobs, FPGA Engineering, ASIC Design, Scripting, Linux, Illinois... more

Oct 20 ASIC Staff Engineer Seagate Indianapolis, IN

design, verification and documentation for ASIC development. Typical duties: Determines ... work with verification and firmware engineer. Good communication. 5. Experience... more

Oct 17 Validation/Test Development Engineer Microsemi San Jose, CA

SoCs and ASICs; power management products; timing and voice processing devices; RF ... for an experienced and highly motivated test engineer who can develop validation test... more

Oct 16 Sr. ASIC/FPGA Design Engineer (Flow/STA) Broadcom Santa Clara, CA

ASIC/FPGA Design Engineer (Flow/STA)* **Business Unit** Broadband and Connectivity **Job D ... ASIC/FPGA Design Engineer (Flow/STA)* *Date:* Wed, 15 10 2014 00:00:00 GMT *Company:* Broa... more

Oct 16 Senior Engineer, ASIC Design Marvell Santa Clara, CA

- timing closure experience a plus - basic DFT/ATE design experience ... - backend working experience with P&R engineer. - HDD experience a plus. more

Oct 15 ASIC Design Engineer (ARM) Job Micron Longmont, CO

Req ID: 22381 As an ASIC Design Engineer at Micron Technology, Inc., you will be part of a ... - Experience in using synthesis, simulation, static timing analysis, power analysis, scan/... more

Oct 15 Engineering Program Manager, ASIC Apple Santa Clara, CA

* Job Number: 36363568 * Address: Santa Clara Valley, California, United States * Posted: Oct. 15, 2014 * Category: Corporate * Job Summary: As a Program Manager for Apple SoC... more

Oct 15 Senior ASIC/Layout Design Engineer (ASIC Verification Engineer) INF-102 Infinera Sunnyvale, CA

experience must include the following: ASIC/FPGA infrastructure development; CAD tools ... analyzers; developing self-checking ASIC/FPGA validation scripts; and experience... more

Oct 15 ASIC Design Engineer Job Micron Longmont, CO

State Drive (SSD) ASIC Design & Verification Engineer at Micron Technology, Inc., you will ... - Knowledge and experience performing timing analysis/debug and implementing design improv... more

Oct 14 Senior or Lead Engineer - ASIC Physical Design Ericsson San Jose, CA

Req ID: 23950 Tech Lead Engineer - ASIC Physical Design Smart Services Router San Jose, ... routing, implementation (using Verilog), timing closure, synthesis of complex ASICs. Must... more

Oct 14 FPGA Design Engineer Omnyx Pennsylvania

The FPGA Design Engineer will be responsible to develop FPGA based control, processing, ... in full life-cycle of firmware (FPGA or ASIC) development, verification, and... more

Oct 14 Engineers Emulex Austin, TX

protocols based on ethernet on FPGA and ASIC with Emulex products along with planning ... Express; Linux and Windows servers; FPGA and ASIC validation; SOC unit block level testing... more

Oct 13 Senior Product Engineer - ASIC Design Global Safety Products Company Farmington Hills, MI

of Application Specific Integrated Circuits (ASIC) and Application Specific Standard ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Oct 13 ASIC Physical Design Lead Engineer Avago Technologies Indiana

be required to do equivalence checks, STA, Timing Si and noise closure, power ... have experience formal verification and timing analysis and Eco implementation. more

Oct 13 ASIC Design Engineer Mjk Concepts Valencia, CA

improvement to people's quality of life. ASIC DESIGN ENGINEER Job Function & ... Completion of multiple ASIC project cycles from concept/specification through production... more

Oct 09 Digital Electronics - Digital ASIC and FPGA Design(14019986) Northrop Grumman Baltimore, MD

Digital ASIC Design, and FPGA Design. Our ASIC Design Engineers are involved in the ... routing, clock tree synthesis, static timing analysis and LVS/DRC steps required to... more

Oct 08 Full-time ASIC Verification Technical Link Atlanta, GA

oral communication skills. Ability to clearly document plans. 61472Ability to interface with different teams and prioritize work based on project needs. ASIC Verification, OVM,... more

Oct 08 Sr. ASIC Design Engineer (Timing Verification & Signoff) Intel Santa Clara, CA

full chip timing methodology and guide timing convergence aspects for ASIC design ... Experience in timing and power signoff methodology development, timing corners/modes defin... more

Oct 08 ASIC Design Verification Engineers Johnson Service Group Sunnyvale, CA

Group has immediate contract openings for ASIC Design Verrification Engineers 5+ years ... flow including emulation, prototyping, timing analysis, bring up, lab debug, and ATE... more

Oct 08 Timing Engineer APN Software Services Raleigh, NC

experience with Static Timing Analysis, timing constraints debug, and timing ... engineers to analyze timing results, write timing ECOs to close design timing... more

Oct 08 ASIC Design Engineer Tektronix Beaverton, OR

Tektronix. Description The ASIC architecture engineer will be a member of the ASIC ... * Development of ASIC and system macro-architecture and definition of HW/SW use cases, inc... more

Oct 08 ASIC Engineer American Cybersystems San Jose, CA

Role ASIC Engineer Mandatory Technical Skills - Asic code to FPGA code conversion ... implementation (synthesis,packing,Timing closure) - Verification of the FPGA... more

Oct 08 Electrical Engineer (FPGA/ASIC) - New Grad Rockwell Collins Cedar Rapids, IA

Systems Communication Engineering ASIC/FPGA design team. As an engineer in this ... Experience using ASIC and/or FPGA CAD tools (e.g... more

Oct 08 ASIC Design Engineer Videojet Technologies Beaverton, OR

Tektronix. Description The ASIC architecture engineer will be a member of the ASIC ... * Development of ASIC and system macro-architecture and definition of HW/SW use cases, inc... more

Oct 07 Verification Engineer - ASIC Fusion408 Raleigh, NC

multimillion gate ASICs. The Verification Engineer will be responsible for a wide ... work on cutting-edge technology within the ASIC design industry * Competitive salary *... more

Oct 07 ASIC Physical Designer IV - 7924 eTech Resources Newport Beach, CA

team to debug the design. Required Skills: ASIC and SoC design experience, Physical ... Skills: Verilog RTL skills, Synthesis and Timing analysis experience, Synopsys ICC, DFT... more

Oct 07 Sr. Digital IC Design Engineers Kforce Inc. Phoenix, AZ

A growing semiconductor company in the Phoenix, Arizona (AZ) metropolitan area (East Valley) is looking for Sr. Digital Design Engineers to be a part of a strong digital/mixed... more

Oct 06 ASIC Design Engineer Mavensoft Technologies Los Angeles, CA

California is looking for ASIC  Design Engineer for 9 Months contractor position.  If ... for your time. Job Title:   ASIC Design Engineer Location:   Los Angeles, California... more

Oct 06 Principal ASIC Design Engineer Broadcom Irvine, CA

Job Posting Title Principal ASIC Design Engineer Business Unit Infrastructure and ... high performance communications/networking ASIC products. Experience in mapping... more

Oct 06 Engineer: Mechanical - III ITEKJP00003080 for Designing mechanical components/systems for CPU, PCH, ASIC cooling solutions Collaborative Vision Santa Clara, CA

Engineer: Mechanical - III ITEKJP00003080 for Designing mechanical components/systems for CPU, PCH, ASIC cooling solutions •Designing mechanical components/systems for CPU, PCH,... more

Oct 06 Senior ASIC Design Engineer - Cache System Apple Santa Clara, CA

* The ideal candidate will have 5+ years of ASIC design experience, * 5+ years of ... Work with physical design team to close timing of the same. * Education:... more

Oct 03 ASIC Physical Designer #23336 Vanderhouwen & Associates Newport Beach, CA

you. Summary Our client is looking for a ASIC Physical Designer to join their team. ... Expert in Logic Synthesis and STA Timing Closure. VanderHouwen & Associates,... more

Oct 03 ASIC Verification Engineer Protingent Irvine, CA

We are seeking an ASIC Verification Engineer for a long-term project with our client in ... The Engineer will assist the Design Engineer Leads in executing structural design... more

Oct 01 Real-time Software Engineer MIT Lincoln Laboratory Lexington, MA

Systems Group seeks an experienced software engineer to support our major real-time signal processing programs and their implementation using open architecture-based principles. more

Sep 28 Lead ASIC Design Engineer Viasat Cleveland, OH

hierarchically partitioned layout, ASIC developments * Experience with advanced ... you. In this role as the Lead ASIC Design Engineer you will work in a multidisciplinary... more

Sep 27 Engineer, ASIC Design Results Center Santa Clara, CA

*BS/MS EE/CS with at least 3 years of experience. *Experience in using simulation tools such as Incisive, VCS and/or Questa. *Experience in using Makefile etc to integrate design... more

Sep 25 ASIC Design Engineer Results Center Santa Clara, CA

a strong background in all aspects of ASIC implementation, especially with lint, ... experienced Senior ASIC Design Engineer to work on a series of PCIe-related projects. more

Sep 24 ASIC Physical design engineer Staff. Juniper Networks Sunnyvale, CA

floorplanning, routing, integration, timing and physical verification * Handle ... BS/MS in EE/CS with 12+ years experience in ASIC physical design * Experience in all... more

Sep 23 Principle Engineer 0 Airbag Safety ASIC Design Conexess Group Livonia, MI

5 + years of mixed signal ASIC development/design and/or automotive electronic design expe ... verification/validation of ASIC design desired. Additional Information:Direct Reports:... more

Sep 22 New Graduates 2015 - ASIC Verification Engineer –VEJE65 Cavium Marlborough, MA

Responsibilities: Contribute as an ASIC Verification Engineer developing the next ... networking processors.  Work with a Design Engineer to develop test plans, design bus... more

Sep 19 Senior ASIC Verification Engr Job SanDisk Salt Lake City, UT

•Have 5-9 years of industry experience with successfully completed ASIC/FPGA verification ... Lake City Job Segment: Engineer, Electrical, Unix, Testing, Instrumentation, Engineering,... more

Sep 18 Principal Product ASIC Air Bag Safety Engineer TRW Automotive Farmington Hills, MI

AIRBAG ASIC ENGINEER Product Overview: Cognitive Safety Systems’ remarkable power to help ... 5 + years of mixed signal ASIC development/design and/or automotive electronic design expe... more

Sep 16 Principal ASIC Design Engineer Fortinet Technologies Sunnyvale, CA

atwww.fortinet.com. Principal ASIC Design Engineer Do you enjoy analyzing complex ... to RTL implementation;· Perform ASIC/FPGA verification, synthesis, timing... more

Sep 11 Sr. ASIC Design Engineer (Timing Verification & Signoff) Hillsboro, OR

full chip timing methodology and guide timing convergence aspects for ASIC design ... Experience in timing and power signoff methodology development, timing corners/modes defin... more

Sep 11 ASIC/ Layout Design Engineer 2 AMD Sunnyvale, CA

of Application-Specific Integrated Circuits (ASIC) development from definition, ... and test. Must have knowledge of ASIC flows and tools. Requires knowledge and... more

Sep 05 Intern – ASIC HW Engineer InterDigital King of Prussia, PA

block diagrams, flow diagrams, and timing diagrams. · Writing VHDL or Verilog RTL ... - Electrical Engineering experience: Verilog/VHDL, cycle accurate simulations, FPGA/ASIC s... more

Aug 29 Sr Electrical Engineer - ASIC/FPGA Rockwell Collins Iowa

Government Systems Communication Engineering ASIC/FPGA design team. As an engineer in this ... design, resource tradeoffs, timing analysis and timing closure. â?¢ Testbench... more

Aug 21 Senior Synthesis/Timing Engineer" Job Intel Irvine, CA

Senior Synthesis/Timing Engineer" - 735403 Description Responsibilities: - In this role, t ... requires thorough knowledge of the ASIC design synthesis and timing closure flow... more

Aug 19 ASIC/ Layout Design Engineer 2 Amd | Seamicro Sunnyvale, CA

of Application-Specific Integrated Circuits (ASIC) development from definition, ... and test. Must have knowledge of ASIC flows and tools. Requires knowledge and... more

Aug 14 Hardware Design Verification Engineer - NOT ASIC Enphase Energy Petaluma, CA

seeking a Hardware Design Verification Engineer specializing in product testing for compliance and homologation to international standards. This important role supports the... more

Aug 13 ASIC Physical Designers Synergy Seven Austin, TX

verification including formal equivalence, timing, electrical rules, DRC/LVS, Noise, and electro-migration checks. - Primetime, PTSI, Conformal LEC, RedHawk, Tavor/Airstream,... more

Aug 12 Digital ASIC Electrical Hardware Engineer HP Vancouver, WA

be responsible for creating synthesis and timing constraints to meet design performance ... with firmware engineers to make sure that ASIC hardware is used correctly and... more

Aug 11 Senior Product Engineer - ASIC Design TRW Automotive Holdings Farmington Hills, MI

5 + years of mixed signal ASIC development/design and/or automotive electronic design expe ... and verification/validation of ASIC design desired. Additional Information: Direct... more

Aug 07 MTS ASIC Design Engineer Cameron Resources Group Orlando, FL

an ASIC Design Engineer, you will: Develop ASIC architecture and micro-architecture ... test cases, and test benches Synthesis and Timing methodology Develop code for embedded... more

Jul 28 ASIC Design Engineer (JOB ID : 11871) HCL Technologies Hillsboro, OR

B.Sc. Others Desired skills: * ASIC Design Engineer for RTL * DFT * Physical ... Tools, Scripting languages * ASIC Verification Engineers - Digital Design, Static Timing... more

Jul 23 Engineering Technician CM Level II - Full Time American Engineering Testing Rapid City, SD

10. Communicate with client, contractor and engineer OTHER REQUIREMENTS 1. Ability to ... standards of industry including ASTM, ASIC, and ACT as well as state laws governing... more

Jul 22 Timing Engineer Huntech Consultants Raleigh, NC

engineers to analyze timing results, write timing ECOs to close design timing ... experience with Static Timing Analysis, timing constraints debug, and timing... more

Jun 23 Staff Engineer, SoC/ASIC Architecture Marvell Technology Group Santa Clara, CA

through all IC design Flow, complete backend timing check, bring up silicon in the lab and ... timing reports and assisting in closing timing at the block and chip levels. -... more

Jun 16 ASIC RTL Design Engineer Google Mountain View, CA

* Participate in synthesis, timing/power closure and FPGA/silicon bring-up ... * Experience with ASIC design verification, synthesis, timing/power analysis and DFT... more

Jun 10 Sr. ASIC Design Engineer Real Staffing San Jose, CA

DUTIES AND RESPONSIBILITIES Management of ASIC design development. Meet schedules ... skills QUALIFICATIONS Strong knowledge of ASIC tools including Magma, Verilog, Synopsys... more

Jun 02 Bell Labs - High Speed ASIC Design Researcher - 214 Alcatel-lucent Murray Hill, KY

degree in Electrical Engineering or Master degree with >1 year of ASIC design/layout experience. · Strong hands-on experience and publications in the design, layout and testing of... more

May 15 ASIC Design Engineers (AMRD) Fortinet Sunnyvale, CA

apply, you will be considered for all of our ASIC Design Engineer openings for all teams. ... to RTL implementation * Perform ASIC verification, synthesis, and timing... more

May 13 Senior ASIC Design Engineer Marvell Technology Group Boise, ID

limited to: Parasitic extraction and static timing analysis. Floorplanning and ... hierarchical partitioning. Hierarchical and timing driven place & route. Power and noise... more

Feb 06 ASIC Design Engineer Altera San Jose, CA

for activities covering the whole ASIC frontend flow, which includes developing ... and optimizing the design for better timing, area and power, inserting DFT scan... more

Dec 12 Senior Staff Product Applications Engineer Xilinx San Jose, CA

working knowledge of the entire FPGA or ASIC design process with special attention on embedded design and C-based design. They would have experience with RTL design languages... more

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